7 I²C Interface

The I²C interface uses the SDA and SCL pins to indicate various I/O states to the ATECC608B-TNGTLS. This interface is designed to be compatible at the protocol level with the Microchip AT24C16 Serial EEPROM operating at 1 MHz.

Note: There are many differences between the two devices (for example, the ATECC608B-TNGTLS and AT24C16 have different default I²C addresses); therefore, designers must read the respective data sheets carefully.

The SDA pin is normally pulled high with an external pull-up resistor because the ATECC608B-TNGTLS client includes only an open-drain driver on its output pin. The bus host may either be open-drain or totem pole. In the latter case, it must be tri-stated when the ATECC608B-TNGTLS is driving results on the bus. The SCL pin is an input and must be driven both high and low at all times by an external device or resistor.

Remember: The I²C standard uses the terminology “Master” and “Slave”. The equivalent Microchip terminology used in this document is “Host” and “Client”, respectively.

7 I2C Interface

7 I²C Interface