29.3.2.1 Starting a Conversion

Once the input channel is selected by writing to the MUXPOS (ADCn.MUXPOS) register, a conversion is triggered by writing a ‘1’ to the ADC Start Conversion (STCONV) bit in the Command (ADCn.COMMAND) register. This bit is ‘1’ as long as the conversion is in progress. In Single Conversion mode, STCONV is cleared by hardware when the conversion is completed.

If a different input channel is selected while a conversion is in progress, the ADC will finish the current conversion before changing the channel.

Depending on the accumulator setting, the conversion result is from a single sensing operation or a sequence of accumulated samples. Once the triggered operation is finished, the Result Ready (RESRDY) flag in the Interrupt Flag (ADCn.INTFLAGS) register is set. The corresponding interrupt vector is executed if the Result Ready Interrupt Enable (RESRDY) bit in the Interrupt Control (ADCn.INTCTRL) register is ‘1’ and the Global Interrupt Enable bit is ‘1’.

A single conversion can be started by writing a ‘1’ to the STCONV bit in the ADCn.COMMAND register. The STCONV bit can be used to determine if a conversion is in progress. The STCONV bit will be set during conversion and cleared once the conversion is complete.

The RESRDY interrupt flag in the ADCn.INTFLAGS register will be set even if the specific interrupt is disabled, allowing software to check for finished conversion by polling the flag. A conversion can thus be triggered without causing an interrupt.

Alternatively, a conversion can be triggered by an event. This is enabled by writing a ‘1’ to the Start Event Input (STARTEI) bit in the Event Control (ADCn.EVCTRL) register. Any incoming event routed to the ADC through the Event System (EVSYS) will trigger an ADC conversion. This provides a method to start conversions at predictable intervals or specific conditions.

The event trigger input is edge sensitive. When an event occurs, the STCONV bit in the ADCn.COMMAND register is set. The STCONV bit will be cleared when the conversion is complete.

In Free-Running mode, the first conversion is started by writing the STCONV bit to ‘1’ in the ADCn.COMMAND register. A new conversion cycle is started immediately after the previous conversion cycle has been completed. A conversion complete will set the RESRDY flag in the ADCn.INTFLAGS register.