7.2 Interrupt Vector Mapping

Each of the interrupt vectors is connected to one peripheral instance, as shown in the table below. A peripheral can have one or more interrupt sources, see the Interrupt section in the Functional Description of the respective peripheral for more details on the available interrupt sources.

When the Interrupt condition occurs, an Interrupt flag (nameIF) is set in the Interrupt Flags register of the peripheral (peripheral.INTFLAGS).

An interrupt is enabled or disabled by writing to the corresponding Interrupt Enable (nameIE) bit in the peripheral's Interrupt Control (peripheral.INTCTRL) register.

The naming of the registers may vary slightly in some peripherals.

An interrupt request is generated when the corresponding interrupt is enabled, and the interrupt flag is set. The interrupt request remains Active until the Interrupt flag is cleared. See the peripheral's INTFLAGS register for details on how to clear interrupt flags.

Interrupts must be enabled globally for interrupt requests to be generated.
Table 7-2. Interrupt Vector Mapping

Vector
Number

Program
Address
(word)

Peripheral
Source
(name)

Description
00x00RESET
10x01CRCSCAN_NMINon-Maskable Interrupt available for CRCSCAN
20x02BOD_VLMVoltage Level Monitor interrupt
30x03PORTA_PORTPort A interrupt
40x04PORTB_PORTPort B interrupt(1)
50x05PORTC_PORTPort C interrupt(1)
60x06RTC_CNTReal-Time Counter interrupt
70x07RTC_PITPeriodic Interrupt Timer interrupt (in RTC peripheral)
8 0x08

TCA0_OVF
TCA0_LUNF

Normal: Timer Counter Type A Overflow interrupt.
Split: Timer Counter Type A Low Underflow interrupt.

90x09


TCA0_HUNF

Normal: Unused.
Split: Timer/Counter Type A High Underflow.

100x0A

TCA0_CMP0
TCA0_LCMP0

Normal: Timer/Counter Type A Compare Channel 0 interrupt.
Split: Timer/Counter Type A Low byte Compare Channel 0 interrupt.

110x0B

TCA0_CMP1
TCA0_LCMP1

Normal: Timer/Counter Type A Compare Channel 1 interrupt.
Split: Timer/Counter Type A Low byte Compare Channel 1 interrupt.

120x0C

TCA0_CMP2
TCA0_LCMP2

Normal: Timer/Counter Type A Compare Channel 2 interrupt.
Split: Timer/Counter Type A Low byte Compare Channel 2 interrupt.

130x0DTCB0_INTTimer Counter Type B Capture interrupt
170x10AC0_ACAnalog Comparator interrupt
200x11ADC0_RESRDYAnalog-to-Digital Converter Result Ready interrupt
210x12ADC0_WCOMPAnalog-to-Digital Converter Window Compare interrupt
240x13TWI0_TWISTwo-Wire Interface/I2C Client interrupt
250x14TWI0_TWIMTwo-Wire Interface/I2C Host interrupt
260x15SPI0_INTSerial Peripheral Interface interrupt
270x16USART0_RXCUniversal Synchronous and Asynchronous Receiver and Transmitter Receive Complete interrupt
280x17USART0_DREUniversal Synchronous and Asynchronous Receiver and Transmitter Data Ready interrupt
290x18USART0_TXCUniversal Synchronous and Asynchronous Receiver and Transmitter Transmit Complete interrupt
300x19NVMCTRL_EENonvolatile Memory EEPROM Ready interrupt
Note:
  1. The availability of the port pins depends on the device pin count. PORTB is available for devices with 14 pins or more. PORTC is available for devices with 20 pins or more.