7.1 Peripheral Address Map

The address map shows the base address for each peripheral. For a complete register description and summary for each peripheral, refer to the respective sections.

Table 7-1. Peripheral Address Map
Base AddressNameDescription
0x0000VPORTAVirtual Port A
0x0004VPORTBVirtual Port B(1)
0x0008VPORTCVirtual Port C(1)
0x001CGPIOGeneral Purpose I/O registers
0x0030CPUCPU
0x0040RSTCTRLReset Controller
0x0050SLPCTRLSleep Controller
0x0060CLKCTRLClock Controller
0x0080BODBrown-out Detector
0x00A0VREFVoltage Reference
0x0100WDTWatchdog Timer
0x0110CPUINTInterrupt Controller
0x0120CRCSCANCyclic Redundancy Check Memory Scan
0x0140RTCReal-Time Counter
0x0180EVSYSEvent System
0x01C0CCLConfigurable Custom Logic
0x0200PORTMUXPort Multiplexer
0x0400PORTAPort A Configuration
0x0420PORTBPort B Configuration(1)
0x0440PORTCPort C Configuration(1)
0x0600ADC0Analog-to-Digital Converter 0
0x0670AC0Analog Comparator 0
0x0800USART0Universal Synchronous Asynchronous Receiver Transmitter 0
0x0810TWI0Two-Wire Interface 0
0x0820SPI0Serial Peripheral Interface 0
0x0A00TCA0Timer/Counter Type A 0
0x0A40TCB0Timer/Counter Type B 0
0x0F00SYSCFGSystem Configuration
0x1000NVMCTRLNonvolatile Memory Controller
0x1100SIGROWSignature Row
0x1280FUSESDevice-specific fuses
0x1300USERROWUser Row
Note:
  1. The availability of this register depends on the device pin count. PORTB/VPORTB is available for devices with 14 pins or more. PORTC/VPORTC is available for devices with 20 pins or more.