33.1.2 Channel Selection

The ADPCH register determines which channel is connected to the Sample-and-Hold circuit.

There are several channel selections available as shown in the following selection table:

Table 33-1. ADC Positive Input Channel Selections
ADPCH	ADC Positive Channel Input
`111111`	Fixed Voltage Reference (FVR)⁽²⁾
`111110`	DAC1 output⁽¹⁾
`111101`	Temperature Indicator⁽³⁾
`111100`	AVSS (Analog Ground)
`100011-111000`	Reserved. No channel connected.
`110111`	RG7/ANG7
`110110`	RG6/ANG6
`110101`	RG5/ANG5
`110100`	RG4/ANG4
`110011`	RG3/ANG3
`110010`	RG2/ANG2
`110001`	RG1/ANG1
`110000`	RG0/ANG0
`101111`	RF7/ANF7
`101110`	RF6/ANF6
`101101`	RF5/ANF5
`101100`	RF4/ANF4
`101011`	RF3/ANF3
`101010`	RF2/ANF2
`101001`	RF1/ANF1
`101000`	RF0/ANF0
`100111`	RE7/ANE7
`100110`	RE6/ANE6
`100101`	RE5/ANE5
`100100`	RE4/ANE4
`100011`	RE3/ANE3
`100010`	RE2/ANE2
`100001`	RE1/ANE1
`100000`	RE0/ANE0
`011111`	RD7/AND7
`011110`	RD6/AND6
`011101`	RD5/AND5
`011100`	RD4/AND4
`011011`	RD3/AND3
`011010`	RD2/AND2
`011001`	RD1/AND1
`011000`	RD0/AND0
`010111-010000`	Reserved. No channel connected
`001111`	RB7/ANB7
`001110`	RB6/ANB6
`001101`	RB5/ANB5
`001100`	RB4/ ANB4
`001011`	RB3/ANB3
`001010`	RB2/ ANB2
`001001`	RB1/ ANB1
`001000`	RB0/ANB0
`000111`	RA7/ANA7
`000110`	RA6/ANA6
`000101`	RA5/ANA5
`000100`	RA4/ ANA4
`000011`	RA3/ ANA3
`000010`	RA2/ ANA2
`000001`	RA1/ ANA1
`000000`	RA0/ANA0

When changing channels, a delay is required before starting the next conversion.

Refer to the “ADC Operation” section for more information.

Important: It is recommended to discharge the Sample-and-Hold capacitor when switching between ADC channels by starting a conversion on a channel connected to V_SS and terminating the conversion after the acquisition time has elapsed. If the ADC does not have a dedicated V_SS input channel, the V_SS selection (DAC1R[4:0] = b'00000') through the DAC output channel can be used. If the DAC is in use, a free input channel can be connected to V_SS, and can be used in place of the DAC.