4 Appendix - FMEDA to Diagnostic API Mapping
This appendix maps the hardware element failure modes identified in the SAM C21 FMEDA to the diagnostic library’s API functions that can be used to help implement the safety mechanisms described in the SAM C21 Safety Manual for those failure modes. The DMs are either a responsibility of diagnostic library software or "none" which denotes that it is not the responsibility of the software.
Element | Failure Mode | Safety or Diagnostics Mechanism | Software Diagnostics API Functions |
---|---|---|---|
ADC | ADC will not turn on | ADC_ENABLE | DIAG_ADC_Enable() |
Input mulitplexor error | ADC_OPERATION | DIAG_ADC_Operation() | |
Results nonlinear | ADC_LINEARITY | DIAG_ADC_Linearity() | |
Error out of spec/conversion error | ADC_BOUNDARY | DIAG_ADC_Boundary() | |
10/12 Bit Configuration incorrect | ADC_BOUNDARY | DIAG_ADC_Boundary() | |
Sample and hold error | ADC_LINEARITY | DIAG_ADC_Linearity() | |
Prescaler | ADC_OPERATION | DIAG_ADC_Boundary() | |
Gain error | ADC_OPERATION | DIAG_ADC_Operation() | |
No interrupts generated | ADC_INTERRUPTS | DIAG_ADC_Interrupts() | |
Interrupt cannot be cleared | ADC_INTERRUPTS | DIAG_ADC_Interrupts() | |
ADC will not turn off | ADC_DISABLE | DIAG_ADC_Disable() | |
DMA request error | ADC_DMA | DIAG_ADC_Dma() | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_ADC_SFRReset() DIAG_ADC_SFRWriteRead() | |
BANGAP | Voltage Output Incorrect |
BANDGAP_REFERENCE_VOLTA GE |
DIAG_BANDGAP_ReferenceVol tage() |
Cannot be Connected To ADC |
BANDGAP_REFERENCE_VOLTA GE |
DIAG_BANDGAP_ReferenceVol tage() | |
BODVDD | BODVDD does not release | None | None |
BODVDD does not trigger when it should | BOR_EXTERNAL_VOLTAGE_SUPERVISORS | None | |
BODVDD hold time is too short | BOR_STATUS | None | |
BODVDD triggers when it should not | BOR_STATUS | None | |
BUSSES | Address/Data Bus Failure | BANDGAP_REFERENCE_VOLTAGE | DIAG_BUSSES_Fault() |
CAN | CAN Module will not turn on | CAN_ENABLE | DIAG_CAN_Enable() |
CAN Module will not turn off | CAN_DISABLE | DIAG_CAN_Disable() | |
Transmitted message is incorrect | CAN_LOOPBACK | DIAG_CAN_Transmit1() | |
Received message is incorrect | CAN_LOOPBACK | DIAG_CAN_Transmit1() | |
Incorrect frequency | CAN_CHECKSUM | DIAG_CAN_CrcCheck() | |
Received message is sent to wrong buffer | CAN_TIMING_MONITOR | DIAG_CAN_RxBuffer() | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_CAN_SFRReset() DIAG_CAN_SFRWriteRead() | |
Unintended messages received | CAN_ERROR | None | |
No CAN Interrupt generated | CAN_INTERRUPTS |
DIAG_CAN_TransmitMarching 1() | |
Interrupt cannot be cleared | CAN_INTERRUPTS |
DIAG_CAN_TransmitMarching 1() | |
Power down mode error | None | None | |
Timestamp error | CAN_TIMESTAMP | DIAG_CAN_TimeStamps() | |
CONFIG_Bits + Device ID | Bit Failure/incorrect read data | SFR_CRC | None |
CCL | CCL operation failure | CCL_FUNCTIONAL | None |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | None | |
Comparator | No operation | AC_ENABLE | None |
Incorrect output | AC_VDD_OVER_2 | None | |
Higher current consumption | AC_VDD_OVER_2 | None | |
Incorrect output | AC_DISABLE | None | |
Invalid Operation | AC_VDD_OVER_2 | None | |
Recursive interrupt | AC_INTERRUPTS | None | |
Incorrect Operation | AC_INTERRUPTS | None | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | None | |
Cortex-M0 | CPU executes incorrect instruction | ARM S/W Test Library (STL) | DIAG_CORE_CM0_Config() DIAG_CORE_CM0() |
CPU modifies bits in Core Registers incorrectly | ARM S/W Test Library (STL) | DIAG_CORE_CM0_Config() DIAG_CORE_CM0() | |
PC not forced to Reset Vector when device is reset | ARM S/W Test Library (STL) | DIAG_CORE_CM0_Config() DIAG_CORE_CM0() | |
PC not forced to Interrupt vector when device is interrupted | ARM S/W Test Library (STL) | DIAG_CORE_CM0_Config() DIAG_CORE_CM0() | |
PC does not advance sequentially | ARM S/W Test Library (STL) | DIAG_CORE_CM0_Config() DIAG_CORE_CM0() | |
Wrong data transferred to/from data memory | ARM S/W Test Library (STL) | DIAG_CORE_CM0_Config() DIAG_CORE_CM0() | |
Status register stores wrong status | ARM S/W Test Library (STL) | DIAG_CORE_CM0_Config() DIAG_CORE_CM0() | |
Improper decoding of OPCODE | ARM S/W Test Library (STL) | DIAG_CORE_CM0_Config() DIAG_CORE_CM0() | |
Interrupt priority detection logic not functioning correctly | ARM S/W Test Library (STL) | DIAG_CORE_CM0_Config() DIAG_CORE_CM0() | |
Single cycle I/O port no functioning correctly | ARM S/W Test Library (STL) | DIAG_CORE_CM0_Config() DIAG_CORE_CM0() | |
Hard fault detection not functioning correclty | ARM S/W Test Library (STL) | DIAG_CORE_CM0_Config() DIAG_CORE_CM0() | |
DAC | DAC will not turn on | DAC_ENABLE | DIAG_DAC_Enable() |
Results nonlinear | DAC_LINEARITY | DIAG_DAC_Linearity() | |
Error out of spec | DAC_LINEARITY | DIAG_DAC_Linearity() | |
Max speed mode does not work | DAC_MAX_SPEED | DIAG_DAC_Linearity() | |
Sample and convert sequence control not working | DAC_LINEARITY | DIAG_DAC_Linearity() | |
DAC will not turn off | DAC_DISABLE | DIAG_DAC_Disable() | |
Interrupts are not generated | DAC_INTERRUPTS | None | |
Interrupt cannot be cleared | DAC_INTERRUPTS | None | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_DAC_SFRReset() DIAG_DAC_SFRWriteRead() | |
DMAC | DMA channel won't turn on | DMA_ENABLE | DIAG_DMAC_Enable() |
Hadware/ S/w triggered request ignored | DMA_TRANSFER | DIAG_DMAC_Transfer() | |
Source address failure | DMA_TRANSFER | DIAG_DMAC_Transfer() | |
Destination address failure | DMA_TRANSFER | DIAG_DMAC_Transfer() | |
Data length failure | DMA_TRANSFER | DIAG_DMAC_Transfer() | |
Interrupts are not generated | DMA_INTERRUPTS | DIAG_DMAC_Interrupts() | |
Interrupt cannot be cleared | DMA_INTERRUPTS | DIAG_DMAC_Interrupts() | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_DMAC_SFRReset() DIAG_DMAC_SFRWriteRead() | |
Error in linked list operation | DMA_LINKED_TRANSFER | DIAG_DMAC_LinkedList() | |
DMA channel won't turn off | DMA_DISABLE | DIAG_DMAC_Disable() | |
DIVAS | Improper execution of operation | DIVAS_FUNCTIONAL | DIAG_DIVAS_Functional() |
DSU | CRC Generator won't turn on | DSU_CRC_ENABLE | DIAG_DSU_CRCEnable() |
CRC calculation incorrect | DSU_CRC_CALCULATE | DIAG_DSU_CRCCalc() | |
Memory BIST operation does not start or complete, STATUSA.DONE is not set | DSU_MBIST_READY | DIAG_DSU_MBIST() | |
Memory BIST operation does not detect error | None | None | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_DSU_SFRReset() DIAG_DSU_SFRWriteRead() | |
EIC | Interrupts are not generated | EIC_INTERRUPTS | DIAG_EIC_Interrupts() |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_EIC_SFRReset() DIAG_EIC_SFRWriteRead() | |
External Interrupt polarity selection not functioning | EIC_INTERRUPTS | DIAG_EIC_Interrupts() | |
Interrupts cannot be cleared | EIC_INTERRUPTS | DIAG_EIC_Interrupts() | |
EVSYS | Event resynchronisation is not working correctly | None | None |
Event inputs is not captured correctly | None | None | |
Event outputs is not generated correctly | None | None | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | None | |
Flash | Single Bit Failure | FLASH_CRC_COMPARE | DIAG_FLASH_CRCCompare() |
Multi Bit Failure | FLASH_CRC_COMPARE | DIAG_FLASH_CRCCompare() | |
Column/Row Failure | FLASH_CRC_COMPARE | DIAG_FLASH_CRCCompare() | |
Address decoder failure | FLASH_CRC_COMPARE | DIAG_FLASH_CRCCompare() | |
Incorrect data read from memory | FLASH_CRC_COMPARE | DIAG_FLASH_CRCCompare() | |
Interrupts are not generated | FLASH_INTERRUPTS | DIAG_FLASH_Interrupts() | |
Interrupts cannot be cleared | FLASH_INTERRUPTS | DIAG_FLASH_Interrupts() | |
Program/Erase/Lock operations do not work correctly | FLASH_FUNCTIONAL | DIAG_FLASH_Functional() | |
direct-mapped cache does not work correctly. | FLASH_CRC_COMPARE | DIAG_FLASH_CRCCompare() | |
calibration bit not set or read correctly | FLASH_CALIBRATION | DIAG_FLASH_Calibration() | |
ECC computation is not working properly | FLASH_CRC_COMPARE | DIAG_FLASH_CRCCompare() | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_FLASH_SFRReset() DIAG_FLASH_SFRWriteRead() | |
RWW EEPROM emulation not working properly | None | None | |
Immutable Boot function fails to protect data | FLASH_CRC_COMPARE | DIAG_FLASH_CRCCompare() | |
FREQM | Frequency measurements is not working properly | FREQM_CLOCK_CALIBRATION |
DIAG_FREQM_ClockCalibratio n() |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_FREQM_SFRReset() DIAG_FREQM_SFRWriteRead() | |
GPIO | I/O pin stuck high | IO_PORTS_INPUT_COMPARISON | DIAG_GPIO_InputComparison() |
I/O pin stuck low | IO_PORTS_INPUT_COMPARISON | DIAG_GPIO_InputComparison() | |
Cannot set pin to desired status, Input or Output, pullup/pulldown | IO_PORTS_PULLUP_PULLDOWN and IO_PORTS_DIRECTION | DIAG_GPIO_InputOutputDirection() | |
Drive strength feature is not working properly | IO_PORTS_OUTPUT_DRIVE | DIAG_GPIO_OutputDriveStrength() | |
No output / High Impedance Output | IO_PORTS_OUTPUT_MONITOR | DIAG_GPIO_OutputMonitoring() | |
Input data value is not detected properly | IO_PORTS_INPUT_COMPARISON | DIAG_GPIO_InputComparison() | |
Unable to select the appropriate peripheral function on a pin | IO_PORTS_PERIPHERAL_MUX | DIAG_GPIO_PeripheralMux() | |
Cannot set pin to desired status, Input or Output, pullup/pulldown | IO_PORTS_PULLUP_PULLDOWN and IO_PORTS_DIRECTION | DIAG_GPIO_PullUpPullDown() | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_GPIO_SFRReset() DIAG_GPIO_SFRWriteRead | |
GCLK | GCLK is not generated properly | GCLK_CLOCK_CALIBRATION | DIAG_GCLK_ClockCalibration() |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_GLCK_SFRReset() DIAG_GLCK_SFRWriteRead() | |
MAINVREG | Vreg will not start up | BOR_EXTERNAL_VOLTAGE_SUPERVISORS | None |
Vreg output is unstable | BOR_EXTERNAL_VOLTAGE_SUPERVISORS | None | |
Vreg output is too high | BOR_EXTERNAL_VOLTAGE_SUPERVISORS | None | |
Vreg output is too low | BOR_EXTERNAL_VOLTAGE_SUPERVISORS | None | |
MCLK | MCLK is not generated properly | MCLK_CLOCK_CALIBRATION | DIAG_MCLK_ClockCalibration() |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_MLCK_SFRReset() DIAG_MLCK_SFRWriteRead() | |
OSC32KCTRL | OSC32K won't turn on | OSC32KCTRL_CLOCK_ENABLE |
DIAG_OSC32KCTRL_OSC32KE nable() |
OSC32K won't turn off | OSC32K_DISABLE |
DIAG_OSC32KCTRL_OSC32KDi sable() | |
OSC32K Slow to Startup | OSC32KCTRL_STARTUP | DIAG_OSC32KCTRL_Startup() | |
OSC32K running at the wrong frequency | OSC32KCTRL_CLOCK_CALIBRATION |
DIAG_OSC32KCTRL_FreqCalibr ation() | |
OSCULP32K won't turn on | WDT_INTERRUPTS |
DIAG_WDT_Interrupts() | |
OSCULP32K running at the wrong frequency | OSC32KCTRL_CLOCK_CALIBRATION |
DIAG_OSC32KCTRL_FreqCalibr ation() | |
XOSC32K won't turn on | XOSC32K_ENABLE |
DIAG_OSC32KCTRL_XOSC32KE nable() | |
XOSC32K won't turn off | XOSC32K_DISABLE |
DIAG_OSC32KCTRL_XOSC32KDi sable() | |
XOSC32K Slow to Startup | OSC32KCTRL_STARTUP | DIAG_OSC32KCTRL_Startup() | |
XOSC32K Clock Switch does not occur | OSC32KCTRL_CLOCK_SWITCH |
DIAG_OSC32KCTRL_ClkSwitch( ) | |
XOSC32K Clock failure detector does not switch to OSCULP32K on XOSC32K failure | OSC32KCTRL_CLOCK_FAILURE_DETECTION | DIAG_OSC32KCTRL_ClkSwitchDueToCFD() | |
XOSC32K running at the wrong frequency | OSC32KCTRL_CLOCK_CALIBRATION |
DIAG_OSC32KCTRL_FreqCalibr ation() | |
XOSC32K bypass does not work | None | None | |
OSCCTRL | Interrupts are not generated | OSCCTRL_INTERRUPTS | DIAG_OSCCTRL_Interrupts() |
Interrupts cannot be cleared | OSCCTRL_INTERRUPTS | DIAG_OSCCTRL_Interrupts() | |
OSC48M won't turn on | OSC48M_ENABLE |
DIAG_OSCCTRL_OSC48MEnab le() | |
OSC48M won't turn off | OSC48M_DISABLE |
DIAG_OSCCTRL_OSC48MDisa ble() | |
OSC48M Slow to Startup | OSC_STARTUP | DIAG_OSCCTRL_Startup() | |
OSC48M running at the wrong frequency | OSC_CLOCK_CALIBRATION |
DIAG_OSCCTRL_FreqCalibratio n() | |
Improper Timing/loop control (FDPLL) | FDPLL96M_ENABLE | DIAG_OSCCTRL_FDPLL96MEnable() | |
Invalid Operation, No Operation, Improper Timing /loop control (FDPLL) | OSCCTRL_STARTUP | DIAG_OSCCTRL_Startup() | |
Long startup time (FDPLL) | OSCCTRL_STARTUP | DIAG_OSCCTRL_Startup() | |
XOsc won't turn on | XOSC_ENABLE | DIAG_OSCCTRL_XoscEnable() | |
XOsc won't turn off | XOSC_DISABLE | DIAG_OSCCTRL_XoscDisable() | |
XOsc Slow to Startup | OSCCTRL_STARTUP | DIAG_OSCCTRL_Startup() | |
XOsc running at the wrong frequency | OSCCTRL_CLOCK_CALIBRATION |
DIAG_OSCCTRL_FreqCalibratio n() | |
Clock Switch does not occur | OSCCTRL_CLOCK_SWITCH | DIAG_OSCCTRL_ClkSwitch() | |
Clock failure detector does not switch to INT OSC on EXT OSC failure | OSCCTRL_CLOCK_FAILURE_DETECTION | DIAG_OSCCTRL_ClkSwitchDueToCFD() | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_OSCCTRL_SFRReset() DIAG_OSCCTRL_SFRWriteRea d() | |
PAC | Protection settings not propagated to the others IP | PAC_PROTECTION | DIAG_PAC_Protection() |
Control Register Failure | SFR_RESET | DIAG_PAC_SFRReset() | |
PM | Sleep Mode Controller is not working properly | None | None |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_PM_SFRReset() DIAG_PM_SFRWriteRead() | |
POR | POR does not release | None | None |
POR releases too early | BOR_EXTERNAL_VOLTAGE_SUPERVISORS | None | |
POR activating when Vdd is OK | POR_STATUS | DIAG_POR_Status() | |
PTC | PTC won't turn on | PTC_ENABLE | None |
PTC won't turn off | PTC_DISABLE | None | |
Internal ADC failure in PTC |
PTC_OPEN_PIN_BIST PTC_SHORTED_PIN_BIST | None | |
Failure in X line driver of PTC |
PTC_OPEN_PIN_BIST PTC_REGISTER_FAILURE | None | |
Failure in sensor capacitance compensation circuit of PTC |
PTC_OPEN_PIN_BIST PTC_REGISTER_FAILURE | None | |
Failure in PTC charge integrator |
PTC_OPEN_PIN_BIST PTC_REGISTER_FAILURE | None | |
Interrupts are not generated | PTC_SHORTED_PIN_BIST | None | |
Interrupt cannot be cleared | PTC_SHORTED_PIN_BIST | None | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | None | |
RESET_PIN | RESET stuck low | None | None |
RESET stuck high | None | None | |
RESET signal does not reset microcontroller | None | None | |
RESET filter does not work | None | None | |
RESET stuck high | None | None | |
RESET signal does not reset microcontroller | None | None | |
RESET filter does not work | None | None | |
RSTC | Reset cannot be enabled | RSTC_FUNCTIONAL | DIAG_RSTC_Functional() |
Reset does not occur | RSTC_FUNCTIONAL | DIAG_RSTC_Functional() | |
Reset occurs when it shouldn't | None | None | |
RCAUSE status is not correct | RSTC_FUNCTIONAL | DIAG_RSTC_Functional() | |
Stuck in Reset | None | None | |
RTC | RTC won’t turn on | RTC_ENABLE | DIAG_RTC_Enable() |
RTC won't turn off | RTC_DISABLE | DIAG_RTC_Disable() | |
RTC running with incorrect time base | RTC_TIMER_COMPARISON | DIAG_RTC_TimerComparison() | |
Interrupt is not generated | RTC_INTERRUPTS | DIAG_RTC_Interrupts() | |
Interrupt cannot be cleared | RTC_INTERRUPTS | DIAG_RTC_Interrupts() | |
Validity check on time, calendar, time alarm, calendar alarm registers does not work | None | None | |
Accurate clock calibration for crystal inaccuracy due to temperature variations in error | None | None | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_RTC_SFRReset() DIAG_RTC_SFRWriteRead() | |
SERCOM_I2C | I2C won't turn on | I2C_ENABLE | None |
Transmitted data is incorrect | I2C_TRANSFER | None | |
Received data is incorrect | I2C_TRANSFER | None | |
Incorrect frequency | None | None | |
I2C will not turn off | I2C_DISABLE | None | |
Interrupts not generated | None | None | |
Interrupt cannot be cleared | None | None | |
Timing logic errors | I2C_TRANSFER | None | |
Asynchronous partial wakeup of the peripheral does not work | None | None | |
Inactive circuitry | None | None | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | None | |
SERCOM_SPI | SPI won't turn on | SPI_ENABLE | None |
Transmitted data is incorrect | SPI_LOOPBACK | None | |
Received data is incorrect | SPI_LOOPBACK | None | |
Incorrect frequency | None | None | |
SPI will not turn off | SPI_DISABLE | None | |
Interrupts not generated | SPI_INTERRUPTS | None | |
Interrupt cannot be cleared | SPI_INTERRUPTS | None | |
Delay logic errors | SPI_LOOPBACK | None | |
DMA request error | SPI_DMA | None | |
Inactive circuitry | None | None | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | None | |
SERCOM_USART | USART won't turn on | USART_ENABLE |
DIAG_SERCOM_USART_Enabl e() |
USART will not turn off | USART_DISABLE |
DIAG_SERCOM_USART_Disabl e() | |
Transmitted data is incorrect | USART_LOOPBACK |
DIAG_SERCOM_USART_Trans mitBufOvf() | |
Received data is incorrect | USART_LOOPBACK |
DIAG_SERCOM_USART_Trans mitBufOvf() | |
Incorrect frequency | USART_CHECKSUM |
DIAG_SERCOM_USART_CrcCh eck) | |
Interrupts not generated | USART_INTERRUPTS |
DIAG_SERCOM_USART_Trans mit1() | |
Interrupt cannot be cleared | USART_INTERRUPTS |
DIAG_SERCOM_USART_Trans mit1() | |
DMA request error | USART_DMA | DIAG_SERCOM_USART_Dma() | |
Inactive circuitry | None | None | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_SERCOM_USART_SFRReset() DIAG_SERCOM_USART_SFRWriteRead() | |
SDADC | SDADC will not turn on | SDADC_ENABLE | DIAG_SDADC_Enable() |
SDADC will not turn off | SDADC_DISABLE | DIAG_SDADC_Disable() | |
Clock prescalar error | SDADC_OPERATION | DIAG_SDADC_Operation() | |
Results nonlinear | SDADC_LINEARITY | DIAG_SDADC_Linearity() | |
Error out of spec/conversion error | SDADC_BOUNDARY | DIAG_SDADC_Boundary() | |
Sample and hold error | SDADC_BOUNDARY | DIAG_SDADC_Boundary() | |
Input mulitplexor error | SDADC_OPERATION | DIAG_SDADC_Operation() | |
Gain error | SDADC_OPERATION | DIAG_SDADC_Operation() | |
Chopper mode failure | SDADC_CHOPPER | None | |
No interrupts generated | SDADC_INTERRUPTS | DIAG_SDADC_Interrupts() | |
Interrupt cannot be cleared | SDADC_INTERRUPTS | DIAG_SDADC_Interrupts() | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_SDADC_SFRReset() DIAG_SDADC_SFRWriteRead() | |
SRAM | Single Bit Failure | SRAM_MARCH_LR | DIAG_SRAM_MBIST() |
Multi Bit Failure | SRAM_MARCH_LR | DIAG_SRAM_MBIST() | |
Column/Row Failure | SRAM_MARCH_LR | DIAG_SRAM_MBIST() | |
Address Decoder Failure | SRAM_MARCH_LR | DIAG_SRAM_MBIST() | |
Incorrect data read from memory | SRAM_MARCH_LR | DIAG_SRAM_MBIST() | |
Access request priority handling incorrect | SRAM_MARCH_LR | DIAG_SRAM_MBIST() | |
SUPC | Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_SUPC_SFRReset() DIAG_SUPC_SFRWriteRead() |
TC | Timer won't turn on | TC_ENABLE | DIAG_TC_Enable() |
Timer won't turn off | TC_ENABLE | DIAG_TC_Disable() | |
Timer running with incorrect time base | TC_REDUNDANT_TIMER | DIAG_TC_RedundantTimer() | |
Capture mode error | None | None | |
Waveform error | None | None | |
DMA events not generated | TC_DMA | DIAG_TC_Dma() | |
Register synchronisation error | TC_SYNCBUSY | DIAG_TC_SyncBusy() | |
Fault output not correctly generated | None | None | |
Interrupts are not generated | TC_INTERRUPTS | DIAG_TC_Interrupts() | |
Interrupts cannot be cleared | TC_INTERRUPTS | DIAG_TC_Interrupts() | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_TC_SFRReset() DIAG_TC_SFRWriteRead() | |
TCC | Timer won't turn on | TCC_ENABLE | DIAG_TCC_Enable() |
Timer won't turn off | TCC_DISABLE | DIAG_TCC_Disable() | |
Timer running with incorrect time base | TCC_REDUNDANT_TIMER | DIAG_TCC_RedundantTimer() | |
No interrupts generated | TCC_INTERRUPTS | DIAG_TCC_Interrupts() | |
Interrupts cannot be cleared | TCC_INTERRUPTS | DIAG_TCC_Interrupts() | |
Timer capture operation fails | None | None | |
PWM operation fails | None | None | |
Events not generated correctly | TCC_EVENTS | None | |
Fault conditions are not handled correctly | None | None | |
Dithering mode failure | None | None | |
Output matrix failure | None | None | |
Dead Time Insertion failure | None | None | |
SWAP mode failure | None | None | |
Register synchonization error | TCC_SYNCBUSY | DIAG_TCC_SyncBusy() | |
Pattern generation failure | None | None | |
DMA events not generated | TCC_DMA | DIAG_TCC_Dma() | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_TCC_SFRReset() DIAG_TCC_SFRWriteRead() | |
WDT | Watchdog Timer won't turn on | WDT_ENABLE | DIAG_WDT_Enable() |
Watchdog Timer running with incorrect time base | WDT_SIMPLE_STARTUP | DIAG_WDT_SimpleStartup() | |
Unable to reset WDT | WDT_SIMPLE_STARTUP | DIAG_WDT_SimpleStartup() | |
Watchdog Timer won't turn off | WDT_DISABLE | DIAG_WDT_Disable() | |
Interrupts are not generated | WDT_INTERRUPTS | DIAG_WDT_Interrupts() | |
Reset is not generated | WDT_SIMPLE_STARTUP | DIAG_WDT_SimpleStartup() | |
Interrupt cannot be cleared | WDT_INTERRUPTS | DIAG_WDT_Interrupts() | |
Control Register Failure | SFR_RESET and SFR_WRITE_READ | DIAG_WDT_SFRReset() DIAG_WDT_SFRWriteRead() | |
Others | None | None | None |