Introduction
Microchip's PolarFire SoC FPGAs include the industry's RISC-V based Microprocessor Subsystem (MSS) and FPGA fabric that inherits all the features of the PolarFire family. The PolarFire SoC MSS includes 5x 64-bit RISC-V processor cores, AXI Switch, DDR Controller, Fabric Interface Controllers (FIC), and a rich set of peripherals. It also offers an unparalleled combination of low power consumption, thermal efficiency, and defense-grade security for smart, connected systems. It is the first SoC FPGA with a deterministic L2 memory subsystem enabling real-time applications. Built on the award-winning, mid-range, low-power PolarFire FPGA architecture, PolarFire SoC devices deliver up to 50% lower power than alternative FPGAs, span from 25k to 460k logic elements, and feature 12.7G transceivers.
Microchip's PolarFire SoC Icicle kit features an MPFS250T PolarFire SoC device and on board memories such as LPDDR4, SPI, and eMMC flash for running Linux. For more information, see UG0882: PolarFire SoC FPGA ICICLE Kit User Guide.
Linux boot time is the time length measured from the loading of Zeroth Stage Boot Loader (ZSBL) to the Linux user log-in prompt from the time the PolarFire SoC device is powered on. The PolarFire SoC boot sequence is simple and does not affect the overall performance by avoiding complex boot loader and kernel configurations. This white paper describes the unoptimized and optimized Linux boot time for Yocto and Buildroot platforms measured on PolarFire SoC Icicle kit. The following table lists the system configuration used for measuring the Linux boot time for Yocto and Buildroot.
System Configuration | Description |
---|---|
Product and Architecture | Icicle kit, RISC-V |
Platform | Linux (Yocto and Buildroot) |
CPU Core Frequency | 600 MHz |
External Memory Access | eMMC/SD, LPDDR4 |
LPDDR4 Frequency | 800 MHz |
Compiler | GCC |
Toolchain | riscv64-oe-linux-gcc(v9.3.0) |
Utility | Grabserial |