Start reception by setting the SREN bit or for continuous reception, set the CREN bit.
Interrupt flag bit RCxIF will be set when reception of a character is complete. An interrupt will be generated if the enable bit RCxIE was set.
Read the RCxSTA register to get the ninth bit (if enabled) and determine
if any error occurred during reception.
Read the 8-bit received data by reading the RCxREG
register.
If an overrun error occurs, clear the error by either clearing
the CREN bit or by clearing the SPEN bit which resets the EUSART.
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.