47.2.3 Byte-Oriented and Bit-Oriented Instructions in Indexed Literal Offset Mode
In addition to the new commands in the extended set, enabling the extended instruction set also enables Indexed Literal Offset Addressing mode (see the “Indexed Addressing with Literal Offset” section in the “Memory Organization” chapter). This has a significant impact on the way many commands of the standard PIC18 instruction set are interpreted.
When the extended set is disabled, addresses embedded in opcodes are
treated as literal memory locations, either as a location in the Access Bank (‘a’ =
0) or in a GPR bank designated by the BSR (‘a’ =
1). When the extended instruction set is enabled and ‘a’ =
0, however, a file register argument of 5Fh or
less is interpreted as an offset from the pointer value in FSR2 and not as a literal
address. For practical purposes, this means that all instructions using the Access RAM
bit as an argument – that is, all byte-oriented and bit-oriented instructions, or almost
half of the core PIC18 instructions – may behave differently when the extended
instruction set is enabled.
When the content of FSR2 is 00h, the boundaries of the
Access RAM are essentially remapped to their original values. This may be useful in creating
backward compatible code. If this technique is used, it may be necessary to save the value of FSR2
and restore it when moving back and forth between C and assembly routines to preserve the Stack
Pointer. Users must also keep in mind the syntax requirements of the extended instruction set (see
Extended Instruction Syntax
with Standard PIC18 Commands).
Although the Indexed Literal Offset Addressing mode can be very useful
for dynamic stack and pointer manipulation, it can also be very annoying if a simple arithmetic
operation is carried out on the wrong register. Users who are accustomed to the PIC18 programming
must keep in mind that, when the extended instruction set is enabled, register addresses of
5Fh or less are used for Indexed Literal Offset Addressing.
Representative examples of typical byte-oriented and bit-oriented instructions in the Indexed Literal Offset Addressing mode are provided in the Considerations when Enabling the Extended Instruction Set section to show how execution is affected. The operand conditions shown in the examples are applicable to all instructions of these types.