34.9.1 MDxCON0
Note:
- The modulated output frequency can be greater and asynchronous from the clock that updates this register bit. The bit value may not be valid for higher speed modulator or carrier signals.
- MDBIT must be selected as the modulation source in the MDxSRC register for this operation.
Name: | MDxCON0 |
Offset: | 0x6A |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
EN | OUT | OPOL | BIT | ||||||
Access | R/W | R/W | R/W | R/W | |||||
Reset | 0 | 0 | 0 | 0 |
Bit 7 – EN Modulator Module Enable
Value | Description |
---|---|
1 |
DSM is enabled and mixing input signals |
0 |
DSM is disabled and has no output |
Bit 5 – OUT Modulator Output(1)
Displays the current DSM_out value
Bit 4 – OPOL Modulator Output Polarity Select
Value | Description |
---|---|
1 |
DSM output signal is inverted; idle high output |
0 |
DSM output signal is not inverted; idle low output |
Bit 0 – BIT Modulation Source Signal(2)
Allows direct software control of the modulation signal