34.9.4 MDxCARL
Name: | MDxCARL |
Offset: | 0x6D |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
CL[4:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | ||||
Reset | 0 | 0 | 0 | 0 | 0 |
Bits 4:0 – CL[4:0] Modulator Carrier Low Input Selection
CL | Connection |
---|---|
11111-10111 |
Reserved |
10110 |
CLC8_OUT |
10101 |
CLC7_OUT |
10100 |
CLC6_OUT |
10011 |
CLC5_OUT |
10010 |
CLC4_OUT |
10001 |
CLC3_OUT |
10000 |
CLC2_OUT |
01111 |
CLC1_OUT |
01110 |
NCO3_OUT |
01101 |
NCO2_OUT |
01100 |
NCO1_OUT |
01011 |
PWM4S1P2_OUT |
01010 |
PWM3S1P2_OUT |
01001 |
PWM2S1P2_OUT |
01000 |
PWM1S1P2_OUT |
00111 |
CCP3_OUT |
00110 |
CCP2_OUT |
00101 |
CCP1_OUT |
00100 |
CLKREF_OUT |
00011 |
EXTOSC |
00010 |
HFINTOSC |
00001 |
FOSC (System Clock) |
00000 |
Pin selected by MDCARLPPS |