31.9.6 PWMxPIPOS
Name: | PWMxPIPOS |
Offset: | 0x466,0x475,0x484,0x493 |
PWMx Period Interrupt Postscaler Register
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
PIPOS[7:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 7:0 – PIPOS[7:0] Period Interrupt Postscale Value
Value | Description |
---|---|
n | Period interrupt occurs after n+1 period events |