2 Modes of Operation

The EV27Y72A 3-lead Contact mikroBUS compatible socket board has multiple modes of operation. These are configured via jumpers or 0Ω resistors.

Power Selection

A user can choose between 3.3V or 5V power from the interface header by installing a 0Ω resistor in either the R3 or the R4 locations. When R3 is installed, the 3.3V power source is connected. When R4 is installed, the 5.0V power source is connected. The board is shipped with a default 3.3V supply. If 5V are required, remove the R3 and install the R4.

Important: R3 and R4 must never be populated at the same time.

Modes of Operation

There are four possible modes of operation depending on the SWI interface selected and the power mode selected. The following table indicates how the EV27Y72A development board must be configured for each mode.

Table 2-1. Modes of Operation
Interface Mode	V_CC Powered		Parasitic Powered		Devices Supported
Interface Mode	J3	JPP1	J3	JPP1	Devices Supported
SWI⁽¹⁾	SIO-RX/TX	Closed	SIO-RX/TX	Open	ATSHA204A, ATECC508A, ATECC608B
SWI-PWM⁽²⁾	SIO-SIO_2	Closed	SIO-SIO_2	Open	Future Devices

Note:

The ATECC608A was never implemented in the 3-lead Contact package but supports the SWI interface in 8-lead SOIC and 8-pad UDFN packages.
Microchip will release information on devices that support this interface as they are released to the market.

The SWI mode uses the RX/TX signal for communication purposes. Note that the RX/TX signals are shorted together on the development board. A pull-up resistor is used to pull the signal HIGH when the crypto device communicates to the microcontroller.

The SWI-PWM mode uses the PWM signal for communication. The single-wire communication will be through SIO_2 using J2 pin 1. There is a 1-kΩ pull-up resistor R5 on SIO_2. Jumper J3 needs to short the SIO_2 and SIO pins.

Parasitic Power

The Parasitic Power mode removes the need for a dedicated power source to the crypto device. Power is supplied to the device by capacitor C3. The capacitor is charged when SIO is higher than VCC_DVC plus the forward bias drop of diode D2. Diode D2 prevents VCC_DVC from pulling LOW when the SIO signal is driven LOW. For proper operation, VCC_DVC must always be greater than the minimum supply operating voltage of the device. See the specific device data sheet for more details and recommendations.

Tip: For the ATSHA204A, diode D2 can be removed as the device contains an internal diode that takes the place of D2. Removing diode D2 will more closely emulate how an actual Parasitic Power mode application must be implemented with the ATSHA204A.