28.5.7 LUT n Control B

Note:
  1. SPI connections to the CCL work in Host SPI mode only.
  2. USART connections to the CCL work only when the USART is in one of the following modes:
    • Asynchronous USART
    • Synchronous USART host
Name: LUTnCTRLB
Offset: 0x09 + n*0x04 [n=0..3]
Reset: 0x00
Property: Enable-Protected

Bit 76543210 
 INSEL1[3:0]INSEL0[3:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 7:4 – INSEL1[3:0] LUT n Input 1 Source Selection

These bits select the source for input 1 of LUT n.

ValueNameDescription
0x0MASKMasked input
0x1FEEDBACKFeedback input
0x2LINKOutput from LUT(n+1) as input source
0x3EVENTAEvent A as input source
0x4EVENTBEvent B as input source
0x5IOIN1 input source
0x6AC0AC0 OUT input source
0x7-Reserved
0x8USART1USART1 TXD input source
0x9SPI0SPI0 MOSI input source
0xATCA0TCA0 WO1 input source
0xB-Reserved
0xCTCB1TCB1 WO input source
Other-Reserved

Bits 3:0 – INSEL0[3:0] LUT n Input 0 Source Selection

These bits select the source for input 0 of LUT n.

ValueNameDescription
0x0MASKMasked input
0x1FEEDBACKFeedback input
0x2LINKOutput from LUT(n+1) as input source
0x3EVENTAEvent A as input source
0x4EVENTBEvent B as input source
0x5IOIN0 input source
0x6AC0AC0 OUT input source
0x7-Reserved
0x8USART0USART0 TXD input source
0x9SPI0SPI0 MOSI input source
0xATCA0TCA0 WO0 input source
0xB-Reserved
0xCTCB0TCB0 WO input source
Other-Reserved