1.4 Connectors
Connectors and headers on the board are divided between those needed for the Meteor Lake Reference Validation Platform (RVP) connections and those provided by Microchip to program or observe signals on the evaluation board. For a detailed understanding of the connections, please refer to the EV71E60A validation board schematics available on MyMicrochip.
Meteor Lake RVP Connectors
P2 - 240-Pin Expansion Connector: Defined by Intel, this connector serves as the primary interface between the MEC1723 embedded controller and the Intel RVP.
J3 - KSO Keyboard Connector: An 18-pin FFC/FPC connector specified by Intel, used to connect the board to the RVP platform. This interface provides a direct connection between the MEC1723 and the Windows keyboard interface.
J7 - KSI Keyboard Connector: An 8-pin FFC/FPC connector specified by Intel, used to connect the board to the RVP platform. This interface provides a direct connection between the MEC1723 and the Windows keyboard interface.
Additional Connectors
P1 - USB Connector: The micro USB connector supplies power to the board and communicates with the MCP2200 USB-to-UART converter.
J1 - JTAG Connector: The 20-pin JTAG connector provides a configuration and programming interface for the MEC1723 embedded controller. The device can be configured using Microchip’s MPLAB® X IDE or IPE.
J2 - SF100 Dediprog Header: The 8-pin SF100 Dediprog header allows users to flash a firmware image into the onboard QSPI memory.
J4 - Software Developer Interface: The 6-pin header can be used to assist in setting up and validating some of the features of the evaluation board.
J6 - eSPI Probe Header: The eSPI probe header enables monitoring and communication between the eSPI interface and the MEC1723 embedded controller.
J10 - Power Sequence Header: The power sequence header allows users to observe the relative timing of signals associated with the board’s power ramp-up sequence.
