47.3.3 Power-Down Current (IPD)(1, 2,3)

Table 47-3. 
Standard Operating Conditions (unless otherwise stated)
Param. No.Sym.Device CharacteristicsMin.Typ.†Max. +85°CMax. +125°CUnitsConditions
VDDVREGPMNote
D200IPDIPD Base134.3μA3.0V‘b11
0.54.09.0μA3.0V‘b10
38.053.068.9μA3.0V‘b01
171215292μA3.0V‘b00
D201IPD_WDTLow-Frequency Internal Oscillator/WDT1.413.505.00μA3.0V‘b11
D202IPD_SOSCSecondary Oscillator (SOSC)2.14.67.9μA3.0V‘b11
D203IPD_LPBORLow-Power Brown-out Reset (LPBOR)1.23.24.5μA3.0V‘b11
D204IPD_FVR_BUF1FVR Buffer 1 (ADC)183265270μA3.0V‘b11
D204AIPD_FVR_BUF2FVR Buffer 2 (DAC/CMP)59.084.090.7μA3.0V‘bx1 or ‘b10
D205IPD_BORBrown-out Reset (BOR)16.621.022.0μA3.0V‘b11
D206IPD_HLVDHigh/Low Voltage Detect (HLVD)16.921.522.5μA3.0V‘b11
D207IPD_ADCAADC - Active485789790μA3.0V‘bx1 or ‘b10ADC is converting (Note 4)
D208IPD_CMPComparator6095105μA3.0V‘b11

* These parameters are characterized but not tested.

† Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. The peripheral current is the sum of the base IDD and the additional current consumed when this peripheral is enabled. The peripheral ∆ current can be determined by subtracting the base IDD or IPD current from this limit. Max. values must be used when calculating total current consumption.
  2. The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode with all I/O pins in high-impedance state and tied to VSS.
  3. All peripheral currents listed are on a per-peripheral basis if more than one instance of a peripheral is available.
  4. ADC clock source is ADCRC.