4 ADCC Low-Pass Filtering of a Conversion
This example shows how to set the ADCC in the Low-pass Filter mode, read several values and give an average result with the high-frequency noise removed by the filter.
The mode of the ADCC is set through the ADCON2 register. This example sets
the mode to low-pass filter (the ADMD bit field is equal to 0x4) and
sets the time constant of the filter equal to 16 (from the ADCRS bit field; the time
constant is equal to 2 to the power of this bit field).
The ADCC will do a number of conversions equal to the value set in ADRPT, 100 in this example.
The ADCC is configured with right-justified results, running on its dedicated FRC clock.
RA0 is configured as analog input and the main oscillator is HFINTOSC with 1 MHz frequency.
The code will discharge the sample capacitor, initiate the conversion on the analog channel and return the result in a variable that can be checked with the debugger.
To achieve the functionality described by the use case, the following actions will have to be performed:
- System clock initialization
- Port initialization
- ADCC initialization
- Discharge sample capacitor
- Starting the conversion