23.7.11 Counter Period in COUNT16 mode
(CTRLA.MODE=1)
Note: This register is write-synchronized: SYNCBUSY.PER must be checked to ensure the
PER register synchronization is complete.
Name:
PER
Offset:
0x1C
Reset:
0x0000
Property:
PAC Write-Protection,
Write-Synchronized
Bit
15
14
13
12
11
10
9
8
PER[15:8]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
PER[7:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bits 15:0 – PER[15:0] Counter
Period
These bits define
the value of the 16-bit RTC period in COUNT16 mode
(CTRLA.MODE=1).
DS60001632H
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.