27.4.1 ADCON0

ADC Control Register 0
Note:
  1. Only available on 40/44-pin devices (PIC16F15274/75/76).
Name: ADCON0
Offset: 0x09D

Bit 76543210 
 CHS[5:0]GOON 
Access R/WR/WR/WR/WR/WR/WR/W/HS/HCR/W 
Reset 00000000 

Bits 7:2 – CHS[5:0] Analog Channel Select

CHSSelected Channel
111111-100110Reserved
100101FVR Buffer 1
100100VSS
100011-011000Reserved
010111RC7
010110RC6
010101RC5
010100RC4
010011RC3
010010RC2
010001-001110Reserved
001101RB5
001100RB4
001011RB3
001010RB2
001001RB1
001000RB0
000111Reserved
000110Reserved
000101RA5
000100Reserved
000011RA3
000010RA2
000001RA1
000000RA0

Bit 1 – GO ADC Conversion Status

ValueDescription
1ADC conversion cycle in progress. Setting this bit starts an ADC conversion cycle. This bit is automatically cleared by hardware when the ADC conversion has completed.
0ADC conversion completed/not in progress

Bit 0 – ON ADC Enable

ValueDescription
1ADC is enabled
0ADC is disabled an consumes no operating current
Only available on 40/44-pin devices (PIC16F15274/75/76).