32.4.6 Analog-to-Digital Converter (ADC) Conversion Timing Specifications

Table 32-14. 
Standard Operating Conditions (unless otherwise stated)
Param No.Sym.CharacteristicMin.Typ. †Max.UnitsConditions
AD20TADADC Clock Period0.59μsFOSC clock source
AD21126μsADCRC clock source
AD22TCNVConversion Time11TADSet of GO bit to clear of GO bit
AD23TACQAcquisition Time2μs
AD24THCDSample and Hold Capacitor Disconnect TimeFOSC clock source

* - These parameters are characterized but not tested.

† Data in ‘Typ’ column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Figure 32-9. ADC Conversion Timing (ADC Clock FOSC-Based)
Figure 32-10. ADC Conversion Timing (ADC Clock from ADCRC)
Note:
  1. If the ADC clock source is selected as FRC, a time of TCY is added before the ADC clock starts. This allows the SLEEP instruction to be executed.