38.5.8 ADC

Table 38-24. ADC Accuracy Specifications
Operating Conditions:
  • VDD = VDDIO2 = 3.0V
  • TA = 25ºC
SymbolDescriptionMin.Typ. ✝Max.UnitConditions
NRResolution12bit
EINLIntegral nonlinearity error-1.50.11.5LSbVDD = VREF = 3.0V
EDNLDifferential nonlinearity error(1)-10.11LSbVDD = VREF = 3.0V
EOFFOffset error-52.55LSbVDD = VREF = 3.0V
EGAINGain error-51.55LSbVDD = VREF = 3.0V
EABSAbsolute errorLSbVDD = VREF = 3.0V
VADCREFADC reference voltage 1.8VDDV
VAINFull-scale rangeGNDVADCREFV
ZAINRecommended impedance of analog voltage source1
RVREFAADC voltage reference ladder impedance(2)50

Data in the “Typ.” column is at TA = 25°C and VDD = 3.0V unless otherwise specified. These parameters are for design guidance only and are not tested.

Note:
  1. The ADC conversion result never decreases with an increase in the input and has no missing codes.
  2. This is the impedance seen by the VREFA pin when the external reference is selected.
Table 38-25. ADC Conversion Timing Specifications
SymbolDescriptionMin.Typ. ✝Max.UnitConditions
TCLK_ADC *ADC clock period0.58μs
tCNVConversion time 13.5TCLK_ADC + 2TCLK_PER
tACQAcquisition time2TCLK_ADCμs
fADC *Sample rate8130ksps
tSSampling time2TCLK_ADC
tSENSE *Delay for changing MUXPOS to TEMP40μs
tADC_INIT *Initialization time6μs

Data in the “Typ.” column is at TA = 25°C and VDD = 3.0V unless otherwise specified. These parameters are not tested and are for design guidance only.

* These parameters are characterized but not tested in production.