9.7.1 Description

The MIPI I3C Controller (I3CC) implements the protocol functions related to the I3C bus host as defined in the MIPI I3C Specification. The I3CC provides an interface, as specified in MIPI I3C HCI 1.0 Specification, between the system (application) and the I3C bus, allowing communication between I3C devices and legacy I2C devices, with limitations as specified in MIPI I3C Specification.

The I3C system ensures reliable transmission and reception of data. The I3C interface is intended to improve upon the features of the I2C interface, while preserving backward compatibility, with some features not supported, such as clock stretching, clock synchronization, High-Speed mode, and 10-bit addressing.