3.4.2 Embedded Characteristics

Compatible with JEDEC Standard DDR2/DDR3/DDR3L/LPDDR2/LPDDR3 SDRAMs
Operating Range from 0 to 533 MHz
x16 External Data Bus Width
Programmable Output and ODT (On Die Termination) Impedance with Dynamic PVT Compensation
Lane-based Architecture (Byte Lane, Command Lane)

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