10.2.6.1 Battery Charging

The Battery Charging Specification defines the charger detection hardware to be controlled.

The features defined in the Battery Charging Specification can be controlled using TCPC_UPC and the resulting outputs can be observed in TCPC_UPS as shown in the table and figure that follow.

Table 10-2. Battery Charging Specification to USB PHY Mapping
Battery Charging Specification ReferenceTCPC Register Field
Data Contact Detect IDP_SRC Current Source EnableTCPC_UPC.BCIDPSRCE
Data Contact Detect RDM_DWN Pull-Down ControlForce activation: TCPC_UPC.DMPDFE

Force deactivation: TCPC_UPC.DMPDFD

Primary Detection or Secondary DetectionSelect detection type: TCPC_UPC.BCDETSEL
Primary / Secondary Detection

VDP_SRC / VDM_SRC Voltage Source Enable

TCPC_UPC.BCVSRCE
Primary / Secondary Detection

CHG_DET / DCHG_DET(1) Comparator Enable

TCPC_UPC.BCDETE
Primary / Secondary Detection

CHG_DET / DCHG_DET(1) Comparator Output

TCPC_UPS.CHGDCP
ACA Detection EnableTCPC_UPC.TCCE, TCPC_UPC.TCIDSEL
ACA Detection ID Comparators SelectionTCPC_UPC.TCIDCTSEL
ACA Detection ID Comparators OutputTCPC_UPS.CC1ID
Data Contact Detect/ACA-Dock Primary Detection

D+ line state

TCPC_UPS.DP
ACA-A FS B-device/LS B-device Determining

D- line State

TCPC_UPS.DM
Note:
  1. In the Battery Charging Specification, DCHG_DET indicates DCP_DET comparator output in a Portable Device (PD) and indicates PRTBL_DET comparator output in a Charging Downstream Port (CDP).
Figure 10-4. Charger Detection Hardware

After any software change in the Control register (TCPC_UPC) or after any change on the USB ID, D+ or D- lines state, the charger detection outputs in the Status register (TCPC_UPS) may not be valid before an update delay, as shown in the Max Delay Update column of the table below.

These update delays must be respected after any TCPC_UPC software change when implementing the Data Contact Detect, Primary / Secondary Detection and ACA Detection of the “Charger Detection Algorithms” specified in the Battery Charging Specification.

Changes to TCPC_UPS register bits are filtered to avoid USB ID, D+ or D- lines state glitches propagation. The maximum glitch duration that is always filtered is shown in the Min Glitch Filtering column in the table below.

Any longer filtering or debouncing, such as during the tDCD_DBNC time for the D+ or ID lines as specified in the Battery Charging Specification (see Reference Documents), must be performed by periodically sampling TCPC_UPS.

Table 10-3. TCPC_UPS Glitch Filtering Times
TCPC_UPS BitMax Delay UpdateMin Glitch Filtering
TCPC_UPS.DP560 μs450 μs
TCPC_UPS.DM560 μs450 μs
TCPC_UPS.CC1ID560 μs450 μs
TCPC_UPS.CHGDCP140 μs30 μs

Each of the five possible values of RID specified in the Battery Charging Specification corresponds to one of the respective VRID voltage values shown in the figure below.

Figure 10-5. TCPC_UPC.TCIDCTSEL Values of ID Voltage Thresholds to Identify RID

For the purpose of ACA detection, the RID value can be determined by the following example procedure:

  1. Set TCPC_UPC.TCCE to 1, TCPC_UPC.TCIDSEL to 0 and TCPC_UPC.TCIDCTSEL to 2.
  2. Wait for 560 μs.

    a. If the TCPC_UPS.CC1ID comparator output is read at 1, set TCPC_UPC.TCIDCTSEL to 3 and proceed to step 3.

    b. If the TCPC_UPS.CC1ID comparator output is read at 0, set TCPC_UPC.TCIDCTSEL to 1 and proceed to step 4.

  3. Wait for 560 μs.

    a. If the TCPC_UPS.CC1ID comparator output is read at 1, RID value is RID_FLOAT.

    b. If the TCPC_UPS.CC1ID comparator output is read at 0, RID value is RID_A.

  4. Wait for 560 μs.

    a. If the TCPC_UPS.CC1ID comparator output is read at 1, RID value is RID_B.

    b. If the TCPC_UPS.CC1ID comparator output is read at 0, RID value is RID_C.

    Note: Only one TCPC_UPC write is required at each of the two first steps.

Any other sequence to determine RID among the five possible values is permitted at any time as long as the following conditions are fulfilled:

  • TCP_UPS.CC1ID delay update is respected.
  • TCPC_UPC.TCCE is set to 1.
  • TCPC_UPC.TCIDSEL is set to 0.