Operating Conditions- 1.71V to 3.63V,
-40°C to +125°C, DC to 48 MHz
- 1.71V to 3.63V,
-40°C to +85°C, DC to 72 MHz
Core: Arm Cortex-M23 CPU running at up to 72 MHz- 2.64 CoreMark/MHz
and 1.03 DMIPS/MHz
- Nested Vector
Interrupt Controller (NVIC)
- Stack Limit
Checking
- Memory Protection
Unit (MPU)
Memories- Additional 16 KB
of Boot Flash Memory (BFM)
- Additional 32 KB
of Configuration Flash Memory (CFM)
- Flash
Supports:
- Error
Correction Code (ECC) with fault injection
capability
- CRC of
any contiguous section
- Deep
Power Down option while system is in Standby
- In-band
error reporting for both read and write accesses
- Tamper
event logging
- 128 KB SRAM Main
Memory with ECC and fault injection capability
- Retained
in Idle, Standby and Hibernate modes
- 512 Bytes
TrustRAM
Security Features- Arm TrustZone®
technology for flexible hardware isolation of memories and
peripherals
- Configurable partitioning of PFM, BFM, SRAM
- Individual security attribution for each peripheral,
I/O, and external interrupt line
- Secure Boot
(optional)
- Device Identity
Composition Engine (DICE) support
- Physical
Unclonable Function (PUF) generating a device unique key for
local encryption and attestation
| Security Features (Continued...)
- Hardware Security
Module (HSM Lite)
- AES (256
bits), SHA-1, SHA-2, RSA, ECC accelerator
- True
Random Number Generator
- TrustRAM
Advanced Analog Features and Touch- 12-bit ADC module:
- Up to 4.5
Msps
- Up to 12 single-ended channels or 3 differential + 6
single-ended channels
- External reference support
- Two Analog
Comparators with programmable voltage references
- Enhanced Peripheral Touch controller (PTC)
- Up to 324 (18 x 18) mutual capacitance channels
- Up to 36 self-capacitance channels with Driven Shield+
technology for better noise immunity and moisture
tolerance
- Low-power, high-sensitivity, environmentally robust
capacitive touch buttons, sliders, and wheels
- Hardware noise filtering and noise signal
desynchronization for high conducted immunity
- Supports wake-up on touch from Standby Sleep mode
- Supports large self-capacitor sensor
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System- Integrated
Power-on Reset (POR) and programmable Brown-out Detection (BOD)
on VDDIO and VDDREG
- Programmable
Low-Voltage Detect Module (LVD)
- 12-channel event
system for Inter-peripheral Core-independent Operation
(EVSYS)
- Unique 128-bit
serial number
Hardware Safety Features- ECC w/ Fault
Injection capability on Flash and SRAM
- SRAM/TrustRAM
MBIST on boot User Mode accessible
- IP registers
write protection through PAC
- Fail-Safe Clock
Monitor (CFD)
- ISO 26262:2018
Compliant
Power Management- Idle mode for
fast wake up time
- Standby mode,
Backup mode, Off mode, and SleepWalking Peripherals
- Hibernate mode up
to full SRAM retention
Timers/Output Compare/Input Capture- Up to seven
16-bit Timer/Counters for Control (TCC), each with two double
buffered compare/capture channels
- 32-bit Real-Time
Counter (RTC) with clock/calendar functions
- Watchdog Timer
(WDT) with Window mode
Clock Management- 4 MHz to 48 MHz
Crystal Oscillator (XOSC48)
- Clock
failure detection with safe clock switch
- 32.768 kHz
crystal oscillator (XOSC32K)
- Clock
failure detection with safe clock switch
- 32.768 kHz ultra
low-power internal RC oscillator (OSCULP32K)
- 48 MHz digital
Phase-Locked Loop (DFLL48M)
- 1.6 GHz Phase
Locked Loop (PLL1G6)
- Frequency meter
(FREQM)
Software and Tools Support: Develop Prototypes Quickly with A
Powerful, Easy-to-Use Ecosystem- Get code off to a head start with MPLAB Code Configurator
- Graphically configure peripherals, software libraries, and
supported RTOS with MPLAB Harmony v3
- Download MPLAB XC Compiler
- Take advantage of MPLAB X IDE’s support for 32-bit MCUs
- Select the best
debugger for the project: MPLAB® ICE, MPLAB ICD, or
PICkit™
| Direct Memory Access (DMA)- Eight channels
with 4 different block transfer modes
- Programmable
32-bit Cyclic Redundancy Check (CRC)
Input/Output- High current pins
with up to 25 mA source/sink
- Configurable
Open-Drain Output on Digital I/O Pins
- Up to 10
5V-tolerant Input Pins (digital pins only)
- Up to 80
programmable I/O lines
- 16 external
interrupts (EIC)
- Two Configurable
Custom Logic (CCL) that supports:
- Combinatorial logic functions, such as AND, NAND, OR,
and NOR
- Sequential logic functions, such as Flip-Flop and
Latches
- One general
purpose LDO output
- 1.2/1.5/1.8/2.5V generated from VDDIO
- Up to 100
mA
- Two outputs
controlled by SUPC
Communication Interfaces /Digital Peripherals- Two CAN-FD
modules (ISO 11898-1:2015)
- Six Serial
Communication Interfaces (SERCOM), each configurable to operate
as:
- USART
with full-duplex and single wire half-duplex
configuration
- I2C Host/Client up to 3.4 MHz
- SPI
- RS-485,
IRDA, LIN Host/Client
- One Full-Speed
(12 Mbps) Universal Serial Bus (USB) 2.0 interface
- Embedded
Host and device function
- Eight
endpoints
- On-chip
transceiver with integrated serial resistor
- Support
crystal-less operation in device mode
Qualification- AEC-Q100 Grade 1
(-40°C to +125°C)
Debugger Development Support- In-circuit and in-application programming/debugging with SWD and
JTAG
- Cortex-M debugger
port
- Supports 8 breakpoints and 4 watch points
- IEEE®1149-compatible (JTAG) boundary scan
- Non-intrusive hardware-based instruction trace, Secure
Debugging
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