51 Revision History

Revision C - 02/2025

The following updates were performed for this revision:


Section	Updates
General	Multiple formatting updates throughout the document for public release
Product Mapping	All new content
Processor and Architecture	All new content
All Peripherals	Updated all Registers for each Peripheral with new content Updated all Peripheral Dependencies Tables with new content Reformatted the Register Summaries for the following chapters: CAN DMAC USB
Electrical Characteristics	Updated Absolute Maximum Electrical Characteristics with new Voltages Updated CPU Electrical Characteristics with new typ specifications Updated the following sections with new min and max specifications: Power Supply Active Power Idle Power Standby Power Hibernate Power Backup Power OFF Power Wake-up Timing Peripheral Active Power I/O Pin Electrical Characteristics Internal Voltage Reference Electrical Specifications (IVREF) Maximum Clock Frequencies XOSC Electrical Characteristics XOSC32K Electrical Characteristics OSCULP32K Electrical Characteristics DFLL-FDPLL Electrical Characteristics Analog-to-Digital Converter (ADC) Electrical Specifications Comparator (AC) Electrical Characteristics Peripheral Touch Controller (PTC) Electrical Characteristics Serial Peripheral Interface (SPI) Timings Electrical Characteristics Universal Asynchronous Receiver/Transmitter (UART) Electrical Characteristics I²C Electrical Characteristics Controller Area Network (CAN) Electrical Characteristics Timer/Counter Controller (TCC) Electrical Characteristics Universal Serial Bus (USB) Electrical Characteristics Flash Controller Electrical Characteristics Frequency Meter (FREQM) Electrical Characteristics JTAG Electrical Characteristics SWD 2-Wire Electrical Characteristics Configurable Custom Logic (CCL) Electrical Specifications User LDO Electrical Specifications Multi-Channel Ram Controller (MCRAMC) Electrical Specifications

Revision B - 06/2024

The following updates were performed for this revision:


Section	Updates
Power Domain Overview	Replaced the Block Diagram with new content
PIC32CM SG00/GC00 Security Features	Removed erroneous HSM content Removed erroneous Mix-Secure Peripherals content
NVMCTRL - FCW	Updated the LBWP bitfield of the LBWP Register with a new bitfield number designation
NVMCTRL - FCR	Removed erroneous DERR information from Interrupts
Controller Area Network (CAN)	Updated Message RAM with a new bitfield designation Added a new base Address value to the OFFSET bitfield for the CTRLB Register Updated the following registers with adjusted bitfield values: SIDFC XIDFC RXF0C RXBC RXF1C TXBC TXEFC Renamed the TCBS bitfield to TBCS in the TSCFG Register
Hardware Security Module Lite (HSM-Lite)	Updated product naming and added new content
Physically Uncloneable Function (PUF)	Removed obsolete content

Revision A - 02/2024

This is the initial released version of this document.

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.