8.3 In-System Reprogrammable Flash Program Memory

The AVR64EA28/32/48 contains 64 KB on-chip in-system reprogrammable Flash memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized with 16-bit data width. For write protection, the Flash program memory space can be divided into three sections: Boot Loader (BOOT) section, Application Code (APPCODE) section, and Application Data (APPDATA) section. Code placed in one section may be restricted from writing to addresses in other sections. See the Nonvolatile Memory Controller (NVMCTRL) section for more details.

The Program Counter (PC) can address the whole program memory. The procedure for writing Flash memory is described in detail in the NVMCTRL section.

32 KB of the Flash memory is mapped into the data space and is accessible with ordinary LD/ST instructions. See the NVMCTRL section for details on which Flash section maps into the data space. For LD/ST instructions, the Flash is mapped from address 0x8000. The Flash memory can also be read with the LPM instruction. For the LPM instruction, the Flash start address is 0x0000.

The AVR64EA28/32/48 has a CRC module host on the data bus.

Table 8-1. Physical Properties of Flash Memory
Property

AVR64EA48
                                   AVR64EA32
                                   AVR64EA28

Size64 KB
Page size128B
Number of pages512
Start address in data space0x8000
Start address in code space0x0000
The figure below shows the mapping of the physical and logical memory sections.
  • NRWW = No-Read-While-Write
  • RWW = Read-While-Write
See the NVMCTRL section for more details about the different physical and logical memory sections and their configuration.
Figure 8-2. Flash Sections