27.3.2.2.1 Clock Generation

The SCL clock is designed to have a 50/50 duty cycle, where the low period of the duty cycle comprises t_OF and t_LOW. t_HIGH will not start until a high state of SCL has been detected. The BAUD bit field in the TWIn.MBAUD register and the SCL frequency are related by the following formula:

$f_{SCL}=\frac{f_{CLK\mathrm{\_}PER}}{10+2\times BAUD+f_{CLK\mathrm{\_}PER}\times t_R}\mathrm{(1)}$

Equation 1 can be transformed to express BAUD:

$BAUD=\frac{f_{CLK\mathrm{\_}PER}}{2\times f_{SCL}}-(5+\frac{f_{CLK\mathrm{\_}PER}\times t_R}{2})\mathrm{(2)}$

To ensure operation within the specifications of the desired speed mode (Sm, Fm, Fm+), follow these steps:

1. Calculate a value for the BAUD bit field using equation 2
2. Calculate t_LOW using the BAUD value from step 1:
   $t_{LOW\_Fm}=t_{LOW\_Fm+}=\frac{BAUD+6+min(SCLDUTY,BAUD)}{f_{CLKPER}}-t_{OF}\mathrm{(3.1)}$

   $t_{LOW}=\frac{BAUD+6}{f_{CLK\mathrm{\_}PER}}-t_{OF}\mathrm{(3.2)}$

3. Check if your t_LOW from equation 3 is above the specified minimum of the desired mode (t_{LOW_Sm}= 4700 ns, t_{LOW_Fm}= 1300 ns, t_{LOW_Fm+}= 500 ns)
   • If the calculated t_LOW is above the limit, use the BAUD value from equation 2
   • If the limit is not met, calculate a new BAUD value using equation 4, below, where t_{LOW_mode} is either t_{LOW_Sm}, t_{LOW_Fm}, or t_{LOW_Fm+} from the mode specifications:

     $BAUD=f_{CLK\mathrm{\_}PER}\times (t_{LOW\mathrm{\_}mode}+t_{OF})-3\mathrm{(4)}$