31.3.5 Interrupts

Table 31-11. Available Interrupt Vectors and Sources
Name	Vector Description	Interrupt Flag	Conditions
ERROR	Error interrupt	TRIGOVR	A new conversion is triggered while another is in progress
		SAMPOVR	A new conversion overwrites an unread sample in ADCn.SAMPLE
		RESOVR	A new conversion or accumulation overwrites an unread result in ADCn.RESULT
SAMPRDY	Sample Ready interrupt	SAMPRDY	The sample is available in ADCn.SAMPLE
SAMPRDY	Sample Ready interrupt	WCMP	As defined by WINSRC and WINCM in ADCn.CTRLD
RESRDY	Result Ready interrupt	RESRDY	The result is available in ADCn.RESULT
RESRDY	Result Ready interrupt	WCMP	As defined by WINSRC and WINCM in ADCn.CTRLD

When an interrupt condition occurs, the corresponding interrupt flag is set in the peripheral’s Interrupt Flags (peripheral.INTFLAGS) register.

An interrupt source is enabled or disabled by writing to the corresponding enable bit in the peripheral’s Interrupt Control (peripheral.INTCTRL) register.

An interrupt request is generated when the corresponding interrupt source is enabled, and the interrupt flag is set. The interrupt request remains active until the interrupt flag is cleared. See the peripheral’s INTFLAGS register for details on how to clear interrupt flags.