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PIC16(L)F1938/1939 Silicon Errata and Data Sheet Clarifications
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PIC16F1938
PIC16F1939
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1
Silicon Errata Issues
1.8
Module: Master Synchronous Serial Port (MSSP)
Introduction
Silicon Issue Summary
1
Silicon Errata Issues
1.1
Module: Analog-to-Digital Converter (ADC)
1.2
Module: Enhanced Capture Compare PWM (ECCP)
1.3
Module: Timer1
1.4
Module: In-Circuit Serial Programming™ (ICSP™)
1.5
Module: Oscillator (OSC)
1.6
Module: Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART)
1.7
Module: Brown-Out Reset (BOR)
1.8
Module: Master Synchronous Serial Port (MSSP)
1.8.1
The Buffer Full (BF) Bit or MSSP Interrupt Flag (SSPIF) Bit Becomes Set Half of a SCK Cycle Early
2
Data Sheet Clarifications
3
Appendix A: Revision History
Microchip Information
1.8 Module: Master Synchronous Serial Port (MSSP)
