25.5.8 Interrupt Control
| Name: | INTCTRL |
| Offset: | 0x0C |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TRIGB | TRIGA | OVF | |||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 |
Bit 3 – TRIGB Trigger B Interrupt Enable
Writing this bit to ‘1’ enables the interrupt when
trigger input B is received.
Bit 2 – TRIGA Trigger A Interrupt Enable
Writing this bit to ‘1’ enables the interrupt when
trigger input A is received.
Bit 0 – OVF Counter Overflow
Writing this bit to ‘1’ enables the
restart-of-sequence interrupt or overflow interrupt.