3.10 Conditional Branch Instructions

Conditional branch instructions are used to direct program flow based on the contents of the STATUS Register. These instructions are generally used in conjunction with a compare class instruction, but they may be employed effectively after any operation that modifies the STATUS Register.

The compare instructions, CP, CP0 and CPB, perform a subtract operation (minuend – subtrahend), but do not actually store the result of the subtraction. Instead, compare instructions just update the flags in the STATUS Register, such that an ensuing conditional branch instruction may change program flow by testing the contents of the updated STATUS Register. If the result of the STATUS Register test is true, the branch is taken. If the result of the STATUS Register test is false, the branch is not taken.

The supported conditional branch instructions are shown in Table 3-8. This table identifies the condition in the STATUS Register that must be true for the branch to be taken. In some cases, just a single bit is tested (as in BRA C), while in other cases, a complex logic operation is performed (as in BRA GT). Both signed and unsigned conditional tests are supported, and support is provided for DSP algorithms with the OA, OB, SA and SB condition mnemonics.