2.2 Pin Details of RNWF02 Module

This section provides details on pin diagrams and pinout table of RNWF02 Module.
Figure 2-4. RNWF02 Module Pin Diagram
Table 2-2. RNWF02 Module Pinout Table
Pin Number Pin Name Pin Type Pin Description
0 GND Paddle P Thermal ground pad
1 NC No connection
2 I2C_SCL/PA8 I I2C clock connected to TrustFlex or Trust&GO device. Recommended to connect external pull-up resistor of 1.2K.
3 I2C_SDA/PA9 I/O I2C data connected to TrustFlex or Trust&GO device. Recommended to connect external pull-up resistor of 1.2K.
4 NMCLR I Master clear reset, active-low
5 PTA_WLAN_ACTIVE/PB6 O PTA interface, WLAN_ACTIVE
6 PTA_BT_PRIO/PB5 I/O PTA interface, BT_PRIORITY
7 PB7(2) I/O General purpose input output
8 NC No connection
9 GND P Ground
10 DFU_Rx/Strap1/PB0 I

For device firmware update receive pin, strap 1 for UART1 host interface selection, Port B0. Recommended to connect to a pull-down resistor of 100K.

11 INT0/PB2/Wake To wake-up the Wi-Fi® Module from its Deep Sleep (DS) and Extreme Deep Sleep (XDS) mode by the host
12 GND P Ground
13 IRQN/PA6 O Interrupt request (active-low) from the Wi-Fi® Module to wake-up the host from its Sleep state
14 UART1_TX/PA5 O UART1 transmit, Host interface
15 UART1_RTS/PA4 O UART1 Request-to-Send (active low), Host interface
16 UART1_CTS/PA3 I UART1 Clear-to-Send (active-low), Host interface
17 PA2(2) I/O General purpose input output
18 PA0(2) I/O General purpose input output
19 UART1_RX/PA1 I UART1 receive, Host interface
20 VDD P VDD power supply (3.0-3.6V)
21 SOSCI/PTA_BT_ACTIVE/PB4 (1) I Secondary oscillator input for 32.768 KHz external crystal/ PTA Interface BT_ACTIVE
22 SOSCO/PB3 O Secondary oscillator output
23 VDDIO P I/O power supply (1.8-3.6V)
24 TP P Test point –1.5V
25 NC No connection
26 DFU_Tx/Strap2/PB1 I For device firmware update receive pin, strap 2 for UART2 host interface selection, Port B1. Recommended to connect to a pull-down resistor of 100K.
27 UART2_TX/PA7 I/O UART2 transmit for firmware log
28 GND P Ground
29 GND Paddle P Thermal ground pad
Note:
  1. This pin can be configured either as secondary oscillator input pin or as PTA BT_ACTIVE. The RNWF02 Module does not support both the functionality together.

  2. The RNWF02 Module firmware does not support the GPIO functionality at present. In future, this function may be available.