1.5 Hardware Implementation on 8-Bit PIC Microcontrollers

Modern 8-bit PIC microcontrollers offer several Core Independent Peripherals (CIPs) that can be used to implement a state machine completely in hardware. Table 1-5 lists various CIPs that can be used for different state machine functions. Refer to the specific device data sheet for information on availability of these peripherals.

Table 1-5. Core Independent Peripherals on 8-bit PIC® Microcontrollers to Implement Hardware State Machines
State Machine Function	Hardware Implementation	Core Independent Peripherals
State	Flip-Flops	Configurable Logic Block (CLB) Configurable Logic Cell (CLC) Signal Routing Port (SRPORT)
Next-State Function	Discrete Logic Elements	Configurable Logic Block (CLB) Configurable Logic Cell (CLC)
Output Function	Discrete Logic Elements	Configurable Logic Block (CLB) Configurable Logic Cell (CLC)
State Time	Hardware Timers/Counters	Timer0/1/2 Universal Timer (UTMR) Signal Measurement Timer (SMT) Pulse-Width Modulation (PWM)

Important: This document focuses on using a combination of SR Port and CLCs to implement hardware-based state machines.

Tip: The 8-bit PIC® MCUs have versatile interconnections between hardware and firmware. This allows the user to have the flexibility to implement the state machine partly in hardware and partly in firmware. This is especially useful when there are limited hardware resources (such as CLC/CLB logic availability). In such cases, while the actual states and state-transitions can be implemented in hardware, the output logic can be implemented in firmware using written code, allowing users the flexibility to handle application complexity.