1.7 Space Vector Modulation

The final step in the vector control process is to generate pulse-width modulation signals for the three-phase motor voltage signals. In this application note the clamped (Flat top) modulation is explained. This type of modulation has an advantage of reducing switching losses compared to the conventional SVPWM.

Three phase voltages can be obtained from the projection of a single vector on three axes displaced each other 120 degrees as shown in the following figure. The same phase voltages can be obtained from the projections of three vectors displaced each other 120 degrees on a single axis as shown in the following figure.

Figure 1-12. Three Phase Voltage Vectors

The voltage differences do not depend on the position of the vectors in the X axis. This means that the phase-to-phase voltages are not influenced by the common offset of the single-phase voltages, called a homopolar component (this is the mean value of the three single-phase voltages).

Consider these points:

  • Since no neutral connection is present in normal motors, the homopolar component of the applied phase voltages (phase-neutral voltage) has no influence on the motor.
  • We are interested in the phase-to-phase voltages rather than the phase-to-neutral voltages.
  • The maximum amplitude for the sinusoidal voltage of [(vBUS/2)(1+sin(ωt))] is vBUS/2 with the sinusoidal midpoint (offset) at vBUS/2, referred as phase voltage (Refer to Maximum Voltage Amplitude below). For phase-to-phase voltages this limit becomes vBUS*√(3)/2.
  • This limit can be exceeded by moving the midpoint from the vBUS/2 position, accordingly with the phase voltage angular position. This will affect the phase voltages (which will not be sinusoidal anymore), but not the phase-to-phase voltages. Refer to Obtained Phase and Line Voltages below.
  • This is true till the limit (for phase voltage) of vBUS/√(3) (which becomes vBUS for the delta voltages). Above that, the phase voltages displaced each other by 120 degrees can be created only for some angular positions, for which the limit becomes 2vBUS/3 (remember the fundamental vectors of space-vector modulation). Refer to the following figure.
Figure 1-13. Maximum Voltage Amplitude

This clamped modulation is realized by subtracting from each phase voltage, the lowest of the three ones on every step. The result of this operation is obviously always greater than or equal to zero. This offset addition will not influence the delta voltages, as mentioned earlier.

An intuitive representation is the rotating star, as shown in the following figure. There is always a request of zero voltage in one of the three inverter arms, each arm has no commutations during one third of the electrical period, so the commutation losses are reduced (by one third).

Figure 1-14. Rotating Star Representation
Figure 1-15. Obtained Phase and Line Voltages

Implementation steps are as follows:

  • The inputs of the modulation function are the three instantaneous voltages requests from the inverse Clarke transformation. These are va_ref, vb_ref and vc_ref.
  • For the Center Aligned PWM (as shown in the following figure), find the three-phase voltage values with the simple modulation formula (CompareValue = (Period/2)×[(vBUS-vREF)/vBUS]). These three values cannot be directly applied to the PWM compare registers, since some of them can be negative, while the values to be written in the PWM peripheral compare registers must be positive.
    • Compare_va = (Period/2).[(vBUS-va_ref)/vBUS])
    • Compare_vb = (Period/2).[(vBUS-vb_ref)/vBUS])
    • Compare_vc = (Period/2).[(vBUS-vc_ref)/vBUS])
  • The lowest of the three values is found, then it is subtracted to all the three. One of the three results will be zero, the other ones positive (or zero). This also determines which phases are the candidates for the next current readings (the two ones with larger low switch ON period that is the two ones with higher compare register value).
    • vmin = min (Compare_va, Compare_vb, Compare_vc)
    • va_duty = Compare_va - vmin
    • vb_duty = Compare_vb - vmin
    • vc_duty = Compare_vc - vmin
  • The calculated duty cycle values should be within the limits of 0 and half the PWM Period. The maximum limit shall be lesser if the dead time, and the minimum ON time of the lower switches to assure safe bootstrap operations for the high side driving circuitry is considered.
  • If a clamp is applied in the above case to limit the duty cycle, the resulting effect to the output voltages should be considered. Therefore, the Vα and Vβ components should be calculated again as these parameters are used in the rotor angle estimator.
  • To keep a sinusoidal undistorted waveform, it is necessary for a preventative clamp of the voltage vector amplitude below the value vBUS/√(3). The voltage value vBUS used for the clamp in implementation should keep into account the voltage losses due to the dead-times and also of the fluctuations of the bus voltage. If the bus voltage comes from rectified mains it will be affected by a ripple. To avoid torque ripple in motor control, the minimum bus voltage value should be used in the clamp calculation.
Figure 1-16. Center-Aligned PWM