41.3.3 Power-Down Current (IPD)(1,2,3)

Table 41-3. 
Standard Operating Conditions (unless otherwise stated)
Param. No.Sym.Device CharacteristicsMin.Typ.†Max. +85°CMax. +125°CUnitsConditions
VDDNote
D200IPDIPD Base0.447μA3.0V
D201IPD_WDTLow-Frequency Internal Oscillator/WDT0.5513μA3.0V
D202IPD_SOSCSecondary Oscillator (SOSC)8.520μA3.0V
D204IPD_FVR_BUF1FVR Buffer 1 (ADC)406476μA3.0V
D204AIPD_FVR_BUF2FVR Buffer 2 (DAC/CMP)406476μA3.0V
D205IPD_BORBrown-out Reset (BOR)273850μA3.0V
D207IPD_ADCAADC - Active513μA3.0VADC is not converting (Note 4)
D208IPD_CMPComparator274570μA3.0V

* These parameters are characterized but not tested.

† Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. The peripheral current is the sum of the base IDD and the additional current consumed when this peripheral is enabled. The peripheral ∆ current can be determined by subtracting the base IDD or IPDcurrent from this limit. Max. values will be used when calculating total current consumption.
  2. The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode with all I/O pins in High-Impedance state and tied to VSS.
  3. All peripheral currents listed are on a per-peripheral basis if more than one instance of a peripheral is available.
  4. ADC clock source is ADCRC.