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Up to 1-GHz Arm® Cortex®-A7, MIPI Camera, Dual Ethernet, Audio and Security
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Product Pages
SAMA7G54
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8
Security and Cryptography Subsystem
8.10
Security Module (SECUMOD)
8.10.6
Functional Description
8.10.6.5
Erasing Secure Memories
Introduction
Reference Document
1
Overview
2
CPU and Interconnect
3
Memories
4
System Controller
5
Analog Subsystem
6
Image Subsystem
7
Audio Subsystem
8
Security and Cryptography Subsystem
8.1
Overview
8.2
TrustZone Advanced Encryption Standard Bridge (TZAESB)
8.3
TrustZone AES Bridge Address Space Controller (TZAESBASC)
8.4
Advanced Encryption Standard (AES)
8.5
Secure Hash Algorithm (SHA)
8.6
Triple Data Encryption Standard (TDES)
8.7
Random Number Generator (TRNG)
8.8
Integrity Check Monitor (ICM)
8.9
Classical Public Key Cryptography Controller (CPKCC)
8.10
Security Module (SECUMOD)
8.10.1
Description
8.10.2
Embedded Characteristics
8.10.3
Block Diagram
8.10.4
I/O Lines Description
8.10.5
Product Dependencies
8.10.6
Functional Description
8.10.6.1
Memory Mapping
8.10.6.2
Scrambling Keys
8.10.6.3
Protection Mechanisms
8.10.6.4
Non-Imprinting
8.10.6.5
Erasing Secure Memories
8.10.6.5.1
BUSRAM4KB Erase Sequence
8.10.6.5.2
BUREG256b Erase Sequence
8.10.6.5.3
During and After BUSRAM4KB and BUREG256b Erase Sequence
8.10.6.5.4
Scrambling Key Protections
8.10.6.6
Operating Modes
8.10.6.7
Activation or Deactivation of Protections
8.10.6.8
Power-up Reset
8.10.7
Register Summary
9
Connectivity Subsystem
10
USB Subsystem
11
Electrical and Mechanical Characteristics
12
Glossary
13
Revision History
Microchip Information
8.10.6.5 Erasing Secure Memories
