1.8.2.2 Pin Description

The device features several PIO controllers that multiplex the I/O lines of the peripheral set. The following Pin Description table defines how the I/O lines are multiplexed on the different PIO controllers. The "Reset State" column shows whether the PIO line resets in I/O mode or in Peripheral mode. If I/O is shown, the PIO line resets with the characteristics (input, output, pull-up or pull-down) indicated in this same column, so that the device is configured in a known state as soon as the reset is released. As a result, PIO_CFGR.FUNC resets to ‘0’. If a signal name is shown in the “Reset State” column, the PIO line is assigned to this function and PIO_CFGR.FUNC is not set to ‘0’. That is the case for pins controlling memories, in particular address lines, which require the pin to be driven as soon as the reset is released.

Table 1-3. Pin Description⁽¹⁾⁽²⁾
343-pin TFBGA	Power Rail	I/O Type⁽³⁾	Primary		Alternate		PIO Peripheral				Reset State⁽⁴⁾
343-pin TFBGA	Power Rail	I/O Type⁽³⁾	Signal	Dir	Signal	Dir	Func	Signal	Dir	I/O Set	Signal, Dir, PU, PD, HiZ, ST
H17	VDDSDMMC0	HSIO	PA0	I/O	–	–	A	SDMMC0_CK	I/O	1	PIO, I, PU, ST
							B	FLEXCOM0_IO0	I/O	1
							C	CANTX3	O	1
							E	PWML0	O	3
G20	VDDSDMMC0	HSIO	PA1	I/O	–	–	A	SDMMC0_CMD	I/O	1	PIO, I, PU, ST
							B	FLEXCOM0_IO1	I/O	1
							C	CANRX3	I	1
							D	D14	I/O	1,2
							E	PWMH0	O	3
L13	VDDSDMMC0	GPIO	PA2	I/O	–	–	A	SDMMC0_RSTN	O	1	PIO, I, PU, ST
							B	FLEXCOM0_IO2	I/O	1
							C	PDMC1_CLK	O	1
							D	D15	I/O	1,2
							E	PWMH1	O	3
							F	FLEXCOM1_IO0	I/O	3
L14	VDDSDMMC0	HSIO	PA3	I/O	–	–	A	SDMMC0_DAT0	I/O	1	PIO, I, PU, ST
							B	FLEXCOM0_IO3	I/O	1
							C	PDMC1_DS0	I	1
							D	NWR1/NBS1	O	1,2
							E	PWML3	O	3
							F	FLEXCOM1_IO1	I/O	3
K13	VDDSDMMC0	HSIO	PA4	I/O	–	–	A	SDMMC0_DAT1	I/O	1	PIO, I, PU, ST
							B	FLEXCOM0_IO4	I/O	1
							C	PDMC1_DS1	I	1
							D	NCS2	O	1,2
							E	PWMH3	O	3
							F	FLEXCOM2_IO0	I/O	3
C21	VDDSDMMC0	HSIO	PA5	I/O	–	–	A	SDMMC0_DAT2	I/O	1	PIO, I, PU, ST
							B	FLEXCOM1_IO0	I/O	1
							C	CANTX2	O	1
							D	A23	O	1,2
							E	PWMEXTRG0	I	3
							F	FLEXCOM2_IO1	I/O	3
K14	VDDSDMMC0	HSIO	PA6	I/O	–	–	A	SDMMC0_DAT3	I/O	1	PIO, I, PU, ST
							B	FLEXCOM1_IO1	I/O	1
							C	CANRX2	I	1
							D	A24	O	1,2
							E	PWMEXTRG1	I	3
							F	FLEXCOM3_IO0	I/O	3
H16	VDDSDMMC0	HSIO	PA7	I/O	–	–	A	SDMMC0_DAT4	I/O	1	PIO, I, PU, ST
							B	FLEXCOM2_IO0	I/O	1
							C	CANTX1	O	1
							D	NWAIT	I	1,2
							E	PWMFI0	I	3
							F	FLEXCOM3_IO1	I/O	3
B21	VDDSDMMC0	HSIO	PA8	I/O	–	–	A	SDMMC0_DAT5	I/O	1	PIO, I, PU, ST
							B	FLEXCOM2_IO1	I/O	1
							C	CANRX1	I	1
							D	NCS0	O	1,2
							E	PWMFI1	I	3
							F	FLEXCOM4_IO0	I/O	3
D20	VDDSDMMC0	HSIO	PA9	I/O	–	–	A	SDMMC0_DAT6	I/O	1	PIO, I, PU, ST
							B	FLEXCOM2_IO2	I/O	1
							C	CANTX0	O	1
							D	SMCK	O	1,2
							E	SPDIF_RX	I	1
							F	FLEXCOM4_IO1	I/O	3
J15	VDDSDMMC0	HSIO	PA10	I/O	–	–	A	SDMMC0_DAT7	I/O	1	PIO, I, PU, ST
							B	FLEXCOM2_IO3	I/O	1
							C	CANRX0	I	1
							D	NCS1	O	1,2
							E	SPDIF_TX	O	1
							F	FLEXCOM5_IO0	I/O	3
F20	VDDSDMMC0	HSIO	PA11	I/O	–	–	A	SDMMC0_DS	I	1	PIO, I, PU, ST
							B	FLEXCOM2_IO4	I/O	1
							D	A0/NBS0	O	1,2
							E	TIOA0	I/O	1
							F	FLEXCOM5_IO1	I/O	3
V14	VDDIOP0	GPIO	PA12	I/O	–	–	A	SDMMC0_WP	I	1	PIO, I, PU, ST
							B	FLEXCOM1_IO3	I/O	1
							D	FLEXCOM3_IO5	I/O	1
							E	PWML2	O	3
							F	FLEXCOM6_IO0	I/O	3
AA16	VDDIOP0	GPIO	PA13	I/O	–	–	A	SDMMC0_1V8SEL	O	1	PIO, I, PU, ST
							B	FLEXCOM1_IO2	I/O	1
							D	FLEXCOM3_IO6	I/O	1
							E	PWMH2	O	3
							F	FLEXCOM6_IO1	I/O	3
AA20	VDDIOP0	GPIO	PA14	I/O	–	–	A	SDMMC0_CD	I	1	PIO, I, PU, ST
							B	FLEXCOM1_IO4	I/O	1
							D	A25	O	1,2
							E	PWML1	O	3
V15	VDDIOP0	GPIO	PA15	I/O	–	–	A	G0_TXEN	O	1	PIO, I, PU, ST
							B	FLEXCOM3_IO0	I/O	1
							C	ISC_MCK	O	1
							D	A1	O	1,2
							E	TIOB0	I/O	1
Y15	VDDIOP0	GPIO	PA16	I/O	–	–	A	G0_TX0	O	1	PIO, I, PU, ST
							B	FLEXCOM3_IO1	I/O	1
							C	ISC_D0	I	1
							D	A2	O	1,2
							E	TCLK0	I	1
V16	VDDIOP0	GPIO	PA17	I/O	–	–	A	G0_TX1	O	1	PIO, I, PU, ST
							B	FLEXCOM3_IO2	I/O	1
							C	ISC_D1	I	1
							D	A3	O	1,2
							E	TIOA1	I/O	1
Y16	VDDIOP0	GPIO	PA18	I/O	–	–	A	G0_RXDV	I	1	PIO, I, PU, ST
							B	FLEXCOM3_IO3	I/O	1
							C	ISC_D2	I	1
							D	A4	O	1,2
							E	TIOB1	I/O	1
V20	VDDIOP0	GPIO	PA19	I/O	–	–	A	G0_RX0	I	1	PIO, I, PU, ST
							B	FLEXCOM3_IO4	I/O	1
							C	ISC_D3	I	1
							D	A5	O	1,2
							E	TCLK1	I	1
Y21	VDDIOP0	GPIO	PA20	I/O	–	–	A	G0_RX1	I	1	PIO, I, PU, ST
							B	FLEXCOM4_IO0	I/O	1
							C	ISC_D4	I	1
							D	A6	O	1,2
							E	TIOA2	I/O	1
V21	VDDIOP0	GPIO	PA21	I/O	–	–	A	G0_RXER	I	1	PIO, I, PU, ST
							B	FLEXCOM4_IO1	I/O	1
							C	ISC_D5	I	1
							D	A7	O	1,2
							E	TIOB2	I/O	1
Y18	VDDIOP0	GPIO	PA22	I/O	–	–	A	G0_MDC	O	1	PIO, I, PU, ST
							B	FLEXCOM4_IO2	I/O	1
							C	ISC_D6	I	1
							D	A8	O	1,2
							E	TCLK2	I	1
R13	VDDIOP0	GPIO	PA23	I/O	–	–	A	G0_MDIO	I/O	1	PIO, I, PU, ST
							B	FLEXCOM4_IO3	I/O	1
							C	ISC_D7	I	1
							D	A9	O	1,2
Y19	VDDIOP0	GPIO	PA24	I/O	–	–	A	G0_TXCK/G0_REFCK	I/O	1	PIO, I, PU, ST
							B	FLEXCOM4_IO4	I/O	1
							C	ISC_HSYNC	I	1
							D	A10	O	1,2
							E	FLEXCOM0_IO5	I/O	1
U14	VDDIOP0	GPIO	PA25	I/O	–	–	A	G0_125CK	I/O	1	PIO, I, PU, ST
							B	FLEXCOM5_IO4	I/O	1
							C	ISC_VSYNC	I	1
							D	A11	O	1,2
							E	FLEXCOM0_IO6	I/O	1
							F	FLEXCOM7_IO0	I/O	3
W16	VDDIOP0	GPIO	PA26	I/O	–	–	A	G0_TX2	O	1	PIO, I, PU, ST
							B	FLEXCOM5_IO2	I/O	1
							C	ISC_FIELD	I	1
							D	A12	O	1,2
							E	TF0	I/O	1
							F	FLEXCOM7_IO1	I/O	3
W18	VDDIOP0	GPIO	PA27	I/O	–	–	A	G0_TX3	O	1	PIO, I, PU, ST
							B	FLEXCOM5_IO3	I/O	1
							C	ISC_PCK	I	1
							D	A13	O	1,2
							E	TK0	I/O	1
							F	FLEXCOM8_IO0	I/O	3
T14	VDDIOP0	GPIO	PA28	I/O	–	–	A	G0_RX2	I	1	PIO, I, PU, ST
							B	FLEXCOM5_IO0	I/O	1
							C	ISC_D8	I	1
							D	A14	O	1,2
							E	RD0	I	1
							F	FLEXCOM8_IO1	I/O	3
W19	VDDIOP0	GPIO	PA29	I/O	–	–	A	G0_RX3	I	1	PIO, I, PU, ST
							B	FLEXCOM5_IO1	I/O	1
							C	ISC_D9	I	1
							D	A15	O	1,2
							E	RF0	I/O	1
							F	FLEXCOM9_IO0	I/O	3
R14	VDDIOP0	GPIO	PA30	I/O	–	–	A	G0_RXCK	I	1	PIO, I, PU, ST
							B	FLEXCOM6_IO4	I/O	1
							C	ISC_D10	I	1
							D	A16	O	1,2
							E	RK0	I/O	1
							F	FLEXCOM9_IO1	I/O	3
W20	VDDIOP0	GPIO	PA31	I/O	–	–	A	G0_TXER	O	1	PIO, I, PU, ST
							B	FLEXCOM6_IO2	I/O	1
							C	ISC_D11	I	1
							D	A17	O	1,2
							E	TD0	O	1
							F	FLEXCOM10_IO0	I/O	3
U18	VDDIOP0	GPIO	PB0	I/O	–	–	A	G0_COL	I	1	PIO, I, PU, ST
							B	FLEXCOM6_IO3	I/O	1
							C	EXT_IRQ0	I	1
							D	A18	O	1,2
							E	SPDIF_RX	I	2
							F	FLEXCOM10_IO1	I/O	3
W21	VDDIOP0	GPIO	PB1	I/O	–	–	A	G0_CRS	I	1	PIO, I, PU, ST
							B	FLEXCOM6_IO1	I/O	1
							C	EXT_IRQ1	I	1
							D	A19	O	1,2
							E	SPDIF_TX	O	2
							F	FLEXCOM11_IO0	I/O	3
T21	VDDIOP0	GPIO	PB2	I/O	–	–	A	G0_TSUCOMP	O	1	PIO, I, PU, ST
							B	FLEXCOM6_IO0	I/O	1
							C	ADTRG	I	1
							D	A20	O	1,2
							F	FLEXCOM11_IO1	I/O	3
V19	VDDIOP0	GPIO	PB3	I/O	–	–	A	RF1	I/O	1	PIO, I, PU, ST
							B	FLEXCOM11_IO0	I/O	1
							C	PCK2	O	2
							D	D8	I/O	1,2
T20	VDDIOP0	GPIO	PB4	I/O	–	–	A	TF1	I/O	1	PIO, I, PU, ST
							B	FLEXCOM11_IO1	I/O	1
							C	PCK3	O	2
							D	D9	I/O	1,2
V18	VDDIOP0	GPIO	PB5	I/O	–	–	A	TK1	I/O	1	PIO, I, PU, ST
							B	FLEXCOM11_IO2	I/O	1,2,3,4,5
							C	PCK4	O	2
							D	D10	I/O	1,2
T19	VDDIOP0	GPIO	PB6	I/O	–	–	A	RK1	I/O	1	PIO, I, PU, ST
							B	FLEXCOM11_IO3	I/O	1,2,3,4,5
							C	PCK5	O	2
							D	D11	I/O	1,2
V17	VDDIOP0	GPIO	PB7	I/O	–	–	A	TD1	O	1	PIO, I, PU, ST
							B	FLEXCOM11_IO4	I/O	1,2,3,4,5
							C	FLEXCOM3_IO5	I/O	2,3,4,5
							D	D12	I/O	1,2
T18	VDDIOP0	GPIO	PB8	I/O	–	–	A	RD1	I	1	PIO, I, PU, ST
							B	FLEXCOM8_IO0	I/O	1
							C	FLEXCOM3_IO6	I/O	2,3,4,5
							D	D13	I/O	1,2
P17	VDDQSPI0	HSIO	PB9	I/O	–	–	A	QSPI0_IO3	I/O	1	PIO, I, PU, ST
							B	FLEXCOM8_IO1	I/O	1
							C	PDMC0_CLK	O	1
							D	NCS3/NANDCS	O	1
							E	PWML0	O	2
P15	VDDQSPI0	HSIO	PB10	I/O	–	–	A	QSPI0_IO2	I/O	1	PIO, I, PU, ST
							B	FLEXCOM8_IO2	I/O	1
							C	PDMC0_DS0	I	1
							D	NWE/NWR0/NANDWE	O	1
							E	PWMH0	O	2
G21	VDDQSPI0	HSIO	PB11	I/O	–	–	A	QSPI0_IO1	I/O	1	PIO, I, PU, ST
							B	FLEXCOM8_IO3	I/O	1
							C	PDMC0_DS1	I	1
							D	NRD/NANDOE	O	1
							E	PWML1	O	2
M15	VDDQSPI0	HSIO	PB12	I/O	–	–	A	QSPI0_IO0	I/O	1	PIO, I, PU, ST
							B	FLEXCOM8_IO4	I/O	1
							C	FLEXCOM6_IO5	I/O	1
							D	A21/NANDALE	O	1
							E	PWMH1	O	2
R16	VDDQSPI0	GPIO	PB13	I/O	–	–	A	QSPI0_CS	O	1	PIO, I, PU, ST
							B	FLEXCOM9_IO0	I/O	1
							C	FLEXCOM6_IO6	I/O	1
							D	A22/NANDCLE	O	1
							E	PWML2	O	2
N14	VDDQSPI0	HSIO	PB14	I/O	–	–	A	QSPI0_SCK	I/O	1	PIO, I, PU, ST
							B	FLEXCOM9_IO1	I/O	1
							D	D0	I/O	1
							E	PWMH2	O	2
N15	VDDQSPI0	HSIO	PB15	I/O	–	–	A	QSPI0_SCKN	I/O	1	PIO, I, PU, ST
							B	FLEXCOM9_IO2	I/O	1
							D	D1	I/O	1
							E	PWML3	O	2
M14	VDDQSPI0	HSIO	PB16	I/O	–	–	A	QSPI0_IO4	I/O	1	PIO, I, PU, ST
							B	FLEXCOM9_IO3	I/O	1
							C	PCK0	O	1
							D	D2	I/O	1
							E	PWMH3	O	2
							F	EXT_IRQ0	I	2
F21	VDDQSPI0	HSIO	PB17	I/O	–	–	A	QSPI0_IO5	I/O	1	PIO, I, PU, ST
							B	FLEXCOM9_IO4	I/O	1
							C	PCK1	O	1
							D	D3	I/O	1
							E	PWMEXTRG0	I	2
							F	EXT_IRQ1	I	2
D21	VDDQSPI0	HSIO	PB18	I/O	–	–	A	QSPI0_IO6	I/O	1	PIO, I, PU, ST
							B	FLEXCOM10_IO0	I/O	1
							C	PCK2	O	1
							D	D4	I/O	1
							E	PWMEXTRG1	I	2
M13	VDDQSPI0	HSIO	PB19	I/O	–	–	A	QSPI0_IO7	I/O	1	PIO, I, PU, ST
							B	FLEXCOM10_IO1	I/O	1
							C	PCK3	O	1
							D	D5	I/O	1
							E	PWMFI0	I	2
J21	VDDQSPI0	HSIO	PB20	I/O	–	–	A	QSPI0_DQS	I	1	PIO, I, PU, ST
							B	FLEXCOM10_IO2	I/O	1,2,3,4,5
							D	D6	I/O	1
							E	PWMFI1	I	2
J20	VDDQSPI0	GPIO	PB21	I/O	–	–	A	QSPI0_INT	I	1	PIO, I, PU, ST
							B	FLEXCOM10_IO3	I/O	1,2,3,4,5
							C	FLEXCOM9_IO5	I/O	1
							D	D7	I/O	1
H15	VDDQSPI1	GPIO	PB22	I/O	–	–	A	QSPI1_IO3	I/O	1	PIO, I, PU, ST
							B	FLEXCOM10_IO4	I/O	1,2,3,4,5
							C	FLEXCOM9_IO6	I/O	1
							D	NANDRDY	I	1
F19	VDDQSPI1	GPIO	PB23	I/O	–	–	A	QSPI1_IO2	I/O	1	PIO, I, PU, ST
							B	FLEXCOM7_IO0	I/O	1
							C	I2SMCC0_CK	I/O	1
							F	PCK4	O	1
G19	VDDQSPI1	GPIO	PB24	I/O	–	–	A	QSPI1_IO1	I/O	1	PIO, I, PU, ST
							B	FLEXCOM7_IO1	I/O	1
							C	I2SMCC0_WS	I/O	1
							F	PCK5	O	1
J14	VDDQSPI1	GPIO	PB25	I/O	–	–	A	QSPI1_IO0	I/O	1	PIO, I, PU, ST
							B	FLEXCOM7_IO2	I/O	1
							C	I2SMCC0_DOUT1	O	1
							F	PCK6	O	1
C20	VDDQSPI1	GPIO	PB26	I/O	–	–	A	QSPI1_CS	O	1	PIO, I, PU, ST
							B	FLEXCOM7_IO3	I/O	1
							C	I2SMCC0_DOUT0	O	1
							E	PWMEXTRG0	I	1
							F	PCK7	O	1
G16	VDDQSPI1	GPIO	PB27	I/O	–	–	A	QSPI1_SCK	I/O	1	PIO, I, PU, ST
							B	FLEXCOM7_IO4	I/O	1
							C	I2SMCC0_MCK	O	1
							E	PWMEXTRG1	I	1
G10	VDDSDMMC1	GPIO	PB28	I/O	–	–	A	SDMMC1_RSTN	O	1	PIO, I, PU, ST
							B	ADTRG	I	2
							E	PWMFI0	I	1
							F	FLEXCOM7_IO0	I/O	4
H11	VDDSDMMC1	HSIO	PB29	I/O	–	–	A	SDMMC1_CMD	I/O	1	PIO, I, PU, ST
							B	FLEXCOM3_IO2	I/O	2,3,4,5
							C	FLEXCOM0_IO5	I/O	2
							D	TIOA3	I/O	1
							E	PWMFI1	I	1
							F	FLEXCOM7_IO1	I/O	4
B9	VDDSDMMC1	HSIO	PB30	I/O	–	–	A	SDMMC1_CK	I/O	1	PIO, I, PU, ST
							B	FLEXCOM3_IO3	I/O	2,3,4,5
							C	FLEXCOM0_IO6	I/O	2
							D	TIOB3	I/O	1
							E	PWMH0	O	1
							F	FLEXCOM8_IO0	I/O	4
A13	VDDSDMMC1	HSIO	PB31	I/O	–	–	A	SDMMC1_DAT0	I/O	1	PIO, I, PU, ST
							B	FLEXCOM3_IO4	I/O	2,3,4,5
							C	FLEXCOM9_IO5	I/O	2,3,4,5
							D	TCLK3	I	1
							E	PWML0	O	1
							F	FLEXCOM8_IO1	I/O	4
A9	VDDSDMMC1	HSIO	PC0	I/O	–	–	A	SDMMC1_DAT1	I/O	1	PIO, I, PU, ST
							B	FLEXCOM3_IO0	I/O	2
							D	TIOA4	I/O	1
							E	PWML1	O	1
							F	FLEXCOM9_IO0	I/O	4
H10	VDDSDMMC1	HSIO	PC1	I/O	–	–	A	SDMMC1_DAT2	I/O	1	PIO, I, PU, ST
							B	FLEXCOM3_IO1	I/O	2
							D	TIOB4	I/O	1
							E	PWMH1	O	1
							F	FLEXCOM9_IO1	I/O	4
A7	VDDSDMMC1	HSIO	PC2	I/O	–	–	A	SDMMC1_DAT3	I/O	1	PIO, I, PU, ST
							B	FLEXCOM4_IO0	I/O	2
							D	TCLK4	I	1
							E	PWML2	O	1
							F	FLEXCOM10_IO0	I/O	4
G1	VDDIN33	GPIO	PC3	I/O	–	–	A	SDMMC1_WP	I	1	PIO, I, PU, ST
							B	FLEXCOM4_IO1	I/O	2
							D	TIOA5	I/O	1
							E	PWMH2	O	1
							F	FLEXCOM10_IO1	I/O	4
H5	VDDIN33	GPIO	PC4	I/O	–	–	A	SDMMC1_CD	I	1	PIO, I, PU, ST
							B	FLEXCOM4_IO2	I/O	2,3,4,5
							C	FLEXCOM9_IO6	I/O	2,3,4,5
							D	TIOB5	I/O	1
							E	PWML3	O	1
							F	FLEXCOM11_IO0	I/O	4
F2	VDDIN33	GPIO	PC5	I/O	–	–	A	SDMMC1_1V8SEL	O	1	PIO, I, PU, ST
							B	FLEXCOM4_IO3	I/O	2,3,4,5
							C	FLEXCOM6_IO5	I/O	2,3,4,5
							D	TCLK5	I	1
							E	PWMH3	O	1
							F	FLEXCOM11_IO1	I/O	4
K8	VDDIN33	GPIO	PC6	I/O	ACC_INP0	I	A	–			PIO, I, PU, ST
							B	FLEXCOM4_IO4	I/O	2,3,4,5
							C	FLEXCOM6_IO6	I/O	2,3,4,5
J8	VDDIN33	GPIO	PC7	I/O	ACC_INN1	I	A	I2SMCC0_DIN0	I	1	PIO, I, PU, ST
J8	VDDIN33	GPIO	PC7	I/O	ACC_INN1	I	B	FLEXCOM7_IO0	I/O	2	PIO, I, PU, ST
F1	VDDIN33	GPIO	PC8	I/O	ACC_INP1	I	A	I2SMCC0_DIN1	I	1	PIO, I, PU, ST
F1	VDDIN33	GPIO	PC8	I/O	ACC_INP1	I	B	FLEXCOM7_IO1	I/O	2	PIO, I, PU, ST
G2	VDDIN33	GPIO	PC9	I/O	ACC_INN2	I	A	I2SMCC0_DOUT3	O	1	PIO, I, PU, ST
							B	FLEXCOM7_IO2	I/O	2,3,4,5
							F	FLEXCOM1_IO0	I/O	4
M10	VDDIN33	GPIO	PC10	I/O	ACC_INP2	I	A	I2SMCC0_DOUT2	O	1	PIO, I, PU, ST
							B	FLEXCOM7_IO3	I/O	2,3,4,5
							F	FLEXCOM1_IO1	I/O	4
K9	VDDIN33	GPIO	PC11	I/O	ACC_INN3	I	A	I2SMCC1_CK	I/O	1	PIO, I, PU, ST
							B	FLEXCOM7_IO4	I/O	2,3,4,5
							F	FLEXCOM2_IO0	I/O	4
D1	VDDIN33	GPIO	PC12	I/O	ACC_INP3	I	A	I2SMCC1_WS	I/O	1	PIO, I, PU, ST
							B	FLEXCOM8_IO2	I/O	2,3,4,5
							F	FLEXCOM2_IO1	I/O	4
F8	VDDIN33	GPIO	PC13	I/O	AD0	I	A	I2SMCC1_MCK	O	1	PIO, I, PU, ST
							B	FLEXCOM8_IO1	I/O	2
							F	FLEXCOM3_IO0	I/O	4
D6	VDDIN33	GPIO	PC14	I/O	AD1	I	A	I2SMCC1_DOUT0	O	1	PIO, I, PU, ST
							B	FLEXCOM8_IO0	I/O	2
							F	FLEXCOM3_IO1	I/O	4
H9	VDDIN33	GPIO	PC15	I/O	AD2	I	A	I2SMCC1_DOUT1	O	1	PIO, I, PU, ST
							B	FLEXCOM8_IO3	I/O	2,3,4,5
							F	FLEXCOM4_IO0	I/O	4
D5	VDDIN33	GPIO	PC16	I/O	AD3	I	A	I2SMCC1_DOUT2	O	1	PIO, I, PU, ST
							B	FLEXCOM8_IO4	I/O	2,3,4,5
							F	FLEXCOM4_IO1	I/O	4
D3	VDDIN33	GPIO	PC17	I/O	AD4	I/O	A	I2SMCC1_DOUT3	O	1	PIO, I, PU, ST
							B	EXT_IRQ0	I	3
							F	FLEXCOM5_IO0	I/O	4
C4	VDDIN33	GPIO	PC18	I/O	AD5	I/O	A	I2SMCC1_DIN0	I	1	PIO, I, PU, ST
							B	FLEXCOM9_IO0	I/O	2
							F	FLEXCOM5_IO1	I/O	4
G8	VDDIN33	GPIO	PC19	I/O	AD6	I	A	I2SMCC1_DIN1	I	1	PIO, I, PU, ST
							B	FLEXCOM9_IO1	I/O	2
							F	FLEXCOM6_IO0	I/O	4
D4	VDDIN33	GPIO	PC20	I/O	AD7	I	A	I2SMCC1_DIN2	I	1	PIO, I, PU, ST
							B	FLEXCOM9_IO4	I/O	2,3,4,5
							F	FLEXCOM6_IO1	I/O	4
E4	VDDIN33	GPIO	PC21	I/O	AD8	I	A	I2SMCC1_DIN3	I	1	PIO, I, PU, ST
							B	FLEXCOM9_IO2	I/O	2,3,4,5
							D	D3	I/O	2
							F	FLEXCOM6_IO0	I/O	5
C3	VDDIN33	GPIO	PC22	I/O	AD9	I	A	I2SMCC0_DIN2	I	1	PIO, I, PU, ST
							B	FLEXCOM9_IO3	I/O	2,3,4,5
							D	D4	I/O	2
							F	FLEXCOM6_IO1	I/O	5
F3	VDDIN33	GPIO	PC23	I/O	AD10	I	A	I2SMCC0_DIN3	I	1	PIO, I, PU, ST
							B	FLEXCOM0_IO5	I/O	3
							D	D5	I/O	2
							F	FLEXCOM7_IO0	I/O	5
C2	VDDIN33	GPIO	PC24	I/O	AD11	I	A	–			PIO, I, PU, ST
							B	FLEXCOM0_IO6	I/O	3
							C	EXT_IRQ1	I	3
							D	D6	I/O	2
							F	FLEXCOM7_IO1	I/O	5
B1	VDDIN33	GPIO	PC25	I/O	–	–	A	NTRST	I	1	NTRST, PU, ST
H7	VDDIN33	GPIO	PC26	I/O	–	–	A	TCK_SWCLK	I	1	TCK_SWCLK, ST
C1	VDDIN33	GPIO	PC27	I/O	–	–	A	TMS_SWDIO	I/O	1	TMS_SWDIO, PU, ST
H6	VDDIN33	GPIO	PC28	I/O	–	–	A	TDI	I	1	TDI, PU, ST
A2	VDDIN33	GPIO	PC29	I/O	–	–	A	TDO	O	1	TDO, ST
G4	VDDIN33	GPIO	PC30	I/O	AD12	I	A	–			PIO, I, PD, ST
G4	VDDIN33	GPIO	PC30	I/O	AD12	I	B	FLEXCOM10_IO0	I/O	2	PIO, I, PD, ST
D2	VDDIN33	GPIO	PC31	I/O	AD13	I	A	–			PIO, I, PD, ST
D2	VDDIN33	GPIO	PC31	I/O	AD13	I	B	FLEXCOM10_IO1	I/O	2	PIO, I, PD, ST
G3	VDDIN33	GPIO	PD0	I/O	AD14	I	A	–			PIO, I, PD, ST
G3	VDDIN33	GPIO	PD0	I/O	AD14	I	B	FLEXCOM11_IO0	I/O	2	PIO, I, PD, ST
F4	VDDIN33	GPIO	PD1	I/O	AD15	I	A	–			PIO, I, PD, ST
F4	VDDIN33	GPIO	PD1	I/O	AD15	I	B	FLEXCOM11_IO1	I/O	2	PIO, I, PD, ST
H12	VDDSDMMC2	GPIO	PD2	I/O	–	–	A	SDMMC2_RSTN	O	1	PIO, I, PU, ST
							B	PCK0	O	2
							C	CANTX4	O	1
							D	D7	I/O	2
							E	TIOA0	I/O	2
							F	FLEXCOM8_IO0	I/O	5
B15	VDDSDMMC2	HSIO	PD3	I/O	–	–	A	SDMMC2_CMD	I/O	1	PIO, I, PU, ST
							B	FLEXCOM0_IO0	I/O	2
							C	CANRX4	I	1
							D	NANDRDY	I	2
							E	TIOB0	I/O	2
							F	FLEXCOM8_IO1	I/O	5
A15	VDDSDMMC2	HSIO	PD4	I/O	–	–	A	SDMMC2_CK	I/O	1	PIO, I, PU, ST
							B	FLEXCOM0_IO1	I/O	2
							C	CANTX5	O	1
							D	NCS3/NANDCS	O	2
							E	TCLK0	I	2
							F	FLEXCOM9_IO0	I/O	5
A16	VDDSDMMC2	HSIO	PD5	I/O	–	–	A	SDMMC2_DAT0	I/O	1	PIO, I, PU, ST
							B	FLEXCOM0_IO2	I/O	2,3
							C	CANRX5	I	1
							D	NWE/NWR0/NANDWE	O	2
							E	TIOA1	I/O	2
							F	FLEXCOM9_IO1	I/O	5
G12	VDDSDMMC2	HSIO	PD6	I/O	–	–	A	SDMMC2_DAT1	I/O	1	PIO, I, PU, ST
							B	FLEXCOM0_IO3	I/O	2,3
							C	SPDIF_RX	I	3
							D	NRD/NANDOE	O	2
							E	TIOB1	I/O	2
							F	FLEXCOM10_IO0	I/O	5
J11	VDDSDMMC2	HSIO	PD7	I/O	–	–	A	SDMMC2_DAT2	I/O	1	PIO, I, PU, ST
							B	FLEXCOM0_IO4	I/O	2,3
							C	SPDIF_TX	O	3
							D	A21/NANDALE	O	2
							E	TCLK1	I	2
							F	FLEXCOM10_IO1	I/O	5
B13	VDDSDMMC2	HSIO	PD8	I/O	–	–	A	SDMMC2_DAT3	I/O	1	PIO, I, PU, ST
							C	I2SMCC0_DIN0	I	2
							D	A22/NANDCLE	O	2
							E	TIOA2	I/O	2
							F	FLEXCOM11_IO0	I/O	5
D19	VDDIOP1	GPIO	PD9	I/O	–	–	A	SDMMC2_WP	I	1	PIO, I, PU, ST
							C	I2SMCC0_DIN1	I	2
							D	D0	I/O	2
							E	TIOB2	I/O	2
							F	FLEXCOM11_IO1	I/O	5
M12	VDDIOP1	GPIO	PD10	I/O	–	–	A	SDMMC2_CD	I	1	PIO, I, PU, ST
							B	PCK6	O	2
							C	I2SMCC0_DIN2	I	2
							D	D1	I/O	2
							E	TCLK2	I	2
							F	FLEXCOM0_IO0	I/O	3
A20	VDDIOP1	GPIO	PD11	I/O	–	–	A	SDMMC2_1V8SEL	O	1	PIO, I, PU, ST
							B	PCK7	O	2
							C	I2SMCC0_DIN3	I	2
							D	D2	I/O	2
							E	TIOA3	I/O	2
							F	FLEXCOM0_IO1	I/O	3
P12	VDDIOP1	GPIO	PD12	I/O	–	–	A	PCK1	O	2	PIO, I, PU, ST
							B	FLEXCOM1_IO0	I/O	2
							D	CANTX0	O	2
							E	TIOB3	I/O	2
H18	VDDIOP1	GPIO	PD13	I/O	–	–	A	I2SMCC0_CK	I/O	2	PIO, I, PU, ST
							B	FLEXCOM1_IO1	I/O	2
							C	PWML0	O	4
							D	CANRX0	I	2
							E	TCLK3	I	2
C19	VDDIOP1	GPIO	PD14	I/O	–	–	A	I2SMCC0_MCK	O	2	PIO, I, PU, ST
							B	FLEXCOM1_IO2	I/O	2,3,4
							C	PWMH0	O	4
							D	CANTX1	O	2
							E	TIOA4	I/O	2
							F	FLEXCOM2_IO0	I/O	5
R12	VDDIOP1	GPIO	PD15	I/O	–	–	A	I2SMCC0_WS	I/O	2	PIO, I, PU, ST
							B	FLEXCOM1_IO3	I/O	2,3,4
							C	PWML1	O	4
							D	CANRX1	I	2
							E	TIOB4	I/O	2
							F	FLEXCOM2_IO1	I/O	5
D18	VDDIOP1	GPIO	PD16	I/O	–	–	A	I2SMCC0_DOUT0	O	2	PIO, I, PU, ST
							B	FLEXCOM1_IO4	I/O	2,3,4
							C	PWMH1	O	4
							D	CANTX2	O	2
							E	TCLK4	I	2
							F	FLEXCOM3_IO0	I/O	5
G18	VDDIOP1	GPIO	PD17	I/O	–	–	A	I2SMCC0_DOUT1	O	2	PIO, I, PU, ST
							B	FLEXCOM2_IO0	I/O	2
							C	PWML2	O	4
							D	CANRX2	I	2
							E	TIOA5	I/O	2
							F	FLEXCOM3_IO1	I/O	5
B19	VDDIOP1	GPIO	PD18	I/O	–	–	A	I2SMCC0_DOUT2	O	2	PIO, I, PU, ST
							B	FLEXCOM2_IO1	I/O	2
							C	PWMH2	O	4
							D	CANTX3	O	2
							E	TIOB5	I/O	2
							F	FLEXCOM4_IO0	I/O	5
N11	VDDIOP1	GPIO	PD19	I/O	–	–	A	I2SMCC0_DOUT3	O	2	PIO, I, PU, ST
							B	FLEXCOM2_IO2	I/O	2,3,4,5
							C	PWML3	O	4
							D	CANRX3	I	2
							E	TCLK5	I	2
							F	FLEXCOM4_IO1	I/O	5
C18	VDDIOP1	GPIO	PD20	I/O	–	–	A	PCK0	O	3	PIO, I, PU, ST
							B	FLEXCOM2_IO3	I/O	2,3,4,5
							C	PWMH3	O	4
							D	CANTX4	O	2
							F	FLEXCOM5_IO0	I/O	5
F18	VDDIOP1	GPIO	PD21	I/O	–	–	A	PCK1	O	3	PIO, I, PU, ST
							B	FLEXCOM2_IO4	I/O	2,3,4,5
							D	CANRX4	I	2
							F	FLEXCOM5_IO1	I/O	5
							G	G1_TXEN	O	1
A19	VDDIOP1	GPIO	PD22	I/O	–	–	A	PDMC0_CLK	O	2	PIO, I, PU, ST
							C	PWMEXTRG0	I	4
							D	RD1	I	2
							F	CANTX5	O	2
							G	G1_TX0	O	1
K12	VDDIOP1	GPIO	PD23	I/O	–	–	A	PDMC0_DS0	I	2	PIO, I, PU, ST
							C	PWMEXTRG1	I	4
							D	RF1	I/O	2
							E	ISC_MCK	O	2
							F	CANRX5	I	2
							G	G1_TX1	O	1
D17	VDDIOP1	GPIO	PD24	I/O	–	–	A	PDMC0_DS1	I	2	PIO, I, PU, ST
							C	PWMFI0	I	4
							D	RK1	I/O	2
							E	ISC_D0	I	2
							G	G1_RXDV	I	1
K10	VDDIOP1	GPIO	PD25	I/O	–	–	A	PDMC1_CLK	O	2	PIO, I, PU, ST
							B	FLEXCOM5_IO0	I/O	2
							C	PWMFI1	I	4
							D	TD1	O	2
							E	ISC_D1	I	2
							G	G1_RX0	I	1
G14	VDDIOP1	GPIO	PD26	I/O	–	–	A	PDMC1_DS0	I	2	PIO, I, PU, ST
							B	FLEXCOM5_IO1	I/O	2
							C	ADTRG	I	3
							D	TF1	I/O	2
							E	ISC_D2	I	2
							G	G1_RX1	I	1
D16	VDDIOP1	GPIO	PD27	I/O	–	–	A	PDMC1_DS1	I	2	PIO, I, PU, ST
							B	FLEXCOM5_IO2	I/O	2,3,4,5
							C	TIOA0	I/O	3
							D	TK1	I/O	2
							E	ISC_D3	I	2
							G	G1_RXER	I	1
J12	VDDIOP1	GPIO	PD28	I/O	–	–	A	RD0	I	2	PIO, I, PU, ST
							B	FLEXCOM5_IO3	I/O	2,3,4,5
							C	TIOB0	I/O	3
							D	I2SMCC1_CK	I/O	2
							E	ISC_D4	I	2
							F	PWML3	O	5
							G	G1_MDC	O	1
B18	VDDIOP1	GPIO	PD29	I/O	–	–	A	RF0	I/O	2	PIO, I, PU, ST
							B	FLEXCOM5_IO4	I/O	2,3,4,5
							C	TCLK0	I	3
							D	I2SMCC1_WS	I/O	2
							E	ISC_D5	I	2
							F	PWMH3	O	5
							G	G1_MDIO	I/O	1
H13	VDDIOP1	GPIO	PD30	I/O	–	–	A	RK0	I/O	2	PIO, I, PU, ST
							B	FLEXCOM6_IO0	I/O	2
							C	TIOA1	I/O	3
							D	I2SMCC1_MCK	O	2
							E	ISC_D6	I	2
							F	PWMEXTRG0	I	5
							G	G1_TXCK/G1_REFCK	I/O	1
C16	VDDIOP1	GPIO	PD31	I/O	–	–	A	TD0	O	2	PIO, I, PU, ST
							B	FLEXCOM6_IO1	I/O	2
							C	TIOB1	I/O	3
							D	I2SMCC1_DOUT0	O	2
							E	ISC_D7	I	2
							F	PWMEXTRG1	I	5
							G	G1_TX2	O	1
E18	VDDIOP1	GPIO	PE0	I/O	–	–	A	TF0	I/O	2	PIO, I, PU, ST
							B	FLEXCOM6_IO2	I/O	2,3,4,5
							C	TCLK1	I	3
							D	I2SMCC1_DOUT1	O	2
							E	ISC_HSYNC	I	2
							F	PWMFI0	I	5
							G	G1_TX3	O	1
F14	VDDIOP1	GPIO	PE1	I/O	–	–	A	TK0	I/O	2	PIO, I, PU, ST
							B	FLEXCOM6_IO3	I/O	2,3,4,5
							C	TIOA2	I/O	3
							D	I2SMCC1_DOUT2	O	2
							E	ISC_VSYNC	I	2
							F	PWMFI1	I	5
							G	G1_RX2	I	1
A18	VDDIOP1	GPIO	PE2	I/O	–	–	A	PWML0	O	5	PIO, I, PU, ST
							B	FLEXCOM6_IO4	I/O	2,3,4,5
							C	TIOB2	I/O	3
							D	I2SMCC1_DOUT3	O	2
							E	ISC_FIELD	I	2
							G	G1_RX3	I	1
C15	VDDIOP1	GPIO	PE3	I/O	–	–	A	PWMH0	O	5	PIO, I, PU, ST
							B	FLEXCOM0_IO0	I/O	4
							C	TCLK2	I	3
							D	I2SMCC1_DIN0	I	2
							E	ISC_PCK	I	2
							G	G1_RXCK	I	1
D15	VDDIOP1	GPIO	PE4	I/O	–	–	A	PWML1	O	5	PIO, I, PU, ST
							B	FLEXCOM0_IO1	I/O	4
							C	TIOA3	I/O	3
							D	I2SMCC1_DIN1	I	2
							E	ISC_D8	I	2
							G	G1_TXER	O	1
B16	VDDIOP1	GPIO	PE5	I/O	–	–	A	PWMH1	O	5	PIO, I, PU, ST
							B	FLEXCOM0_IO2	I/O	4
							C	TIOB3	I/O	3
							D	I2SMCC1_DIN2	I	2
							E	ISC_D9	I	2
							G	G1_COL	I	1
G13	VDDIOP1	GPIO	PE6	I/O	–	–	A	PWML2	O	5	PIO, I, PU, ST
							B	FLEXCOM0_IO3	I/O	4
							C	TCLK3	I	3
							D	I2SMCC1_DIN3	I	2
							E	ISC_D10	I	2
							G	G1_CRS	I	1
E14	VDDIOP1	GPIO	PE7	I/O	–	–	A	PWMH2	O	5	PIO, I, PU, ST
							B	FLEXCOM0_IO4	I/O	4
							C	TIOA4	I/O	3
							E	ISC_D11	I	2
							G	G1_TSUCOMP	O	1
G6	VDDANA	Analog input	ADVREFP	I	–	–	–	–	–	–	–
H3	VDDIN33	Power	VDDIN33	I	–	–	–	–	–	–	–
H1	GNDIN33	Ground	GNDIN33	I	–	–	–	–	–	–	–
F5	GNDANA	Ground	GNDANA	I	–	–	–	–	–	–	–
G5	GNDANA	Ground	GNDANA	I	–	–	–	–	–	–	–
J4	GNDANA	Ground	GNDANA	I	–	–	–	–	–	–	–
T13	VDDIOP0	Power	VDDIOP0	I	–	–	–	–	–	–	–
W14	VDDIOP0	Power	VDDIOP0	I	–	–	–	–	–	–	–
C14	VDDIOP1	Power	VDDIOP1	I	–	–	–	–	–	–	–
C17	VDDIOP1	Power	VDDIOP1	I	–	–	–	–	–	–	–
A11	GND	Ground	GND	I	–	–	–	–	–	–	–
A14	GND	Ground	GND	I	–	–	–	–	–	–	–
A17	GND	Ground	GND	I	–	–	–	–	–	–	–
A21	GND	Ground	GND	I	–	–	–	–	–	–	–
AA1	GND	Ground	GND	I	–	–	–	–	–	–	–
W5	GND	Ground	GND	I	–	–	–	–	–	–	–
AA8	GND	Ground	GND	I	–	–	–	–	–	–	–
AA11	GND	Ground	GND	I	–	–	–	–	–	–	–
AA14	GND	Ground	GND	I	–	–	–	–	–	–	–
AA17	GND	Ground	GND	I	–	–	–	–	–	–	–
AA21	GND	Ground	GND	I	–	–	–	–	–	–	–
D9	GND	Ground	GND	I	–	–	–	–	–	–	–
E5	VDDANA	Power	VDDANA	I	–	–	–	–	–	–	–
E6	VDDANA	Power	VDDANA	I	–	–	–	–	–	–	–
J6	VDDIN33	Analog output	VDDOUT25	O	–	–	–	–	–	–	–
F6	VDDCORE	Power	VDDCORE	I	–	–	–	–	–	–	–
F9	VDDCORE	Power	VDDCORE	I	–	–	–	–	–	–	–
F15	VDDCORE	Power	VDDCORE	I	–	–	–	–	–	–	–
J9	VDDCORE	Power	VDDCORE	I	–	–	–	–	–	–	–
J13	VDDCORE	Power	VDDCORE	I	–	–	–	–	–	–	–
L3	VDDCORE	Power	VDDCORE	I	–	–	–	–	–	–	–
L19	VDDCORE	Power	VDDCORE	I	–	–	–	–	–	–	–
N13	VDDCORE	Power	VDDCORE	I	–	–	–	–	–	–	–
P19	VDDCORE	Power	VDDCORE	I	–	–	–	–	–	–	–
U16	VDDCORE	Power	VDDCORE	I	–	–	–	–	–	–	–
U17	VDDCORE	Power	VDDCORE	I	–	–	–	–	–	–	–
U19	VDDCORE	Power	VDDCORE	I	–	–	–	–	–	–	–
W17	VDDCORE	Power	VDDCORE	I	–	–	–	–	–	–	–
Y20	VDDCORE	Power	VDDCORE	I	–	–	–	–	–	–	–
B20	VDDCPU	Power	VDDCPU	I	–	–	–	–	–	–	–
E16	VDDCPU	Power	VDDCPU	I	–	–	–	–	–	–	–
E17	VDDCPU	Power	VDDCPU	I	–	–	–	–	–	–	–
E19	VDDCPU	Power	VDDCPU	I	–	–	–	–	–	–	–
F16	VDDCPU	Power	VDDCPU	I	–	–	–	–	–	–	–
D13	GND	Ground	GND	I	–	–	–	–	–	–	–
E7	GND	Ground	GND	I	–	–	–	–	–	–	–
E15	GND	Ground	GND	I	–	–	–	–	–	–	–
E21	GND	Ground	GND	I	–	–	–	–	–	–	–
F17	GND	Ground	GND	I	–	–	–	–	–	–	–
G11	GND	Ground	GND	I	–	–	–	–	–	–	–
G15	GND	Ground	GND	I	–	–	–	–	–	–	–
G17	GND	Ground	GND	I	–	–	–	–	–	–	–
H8	GND	Ground	GND	I	–	–	–	–	–	–	–
H14	GND	Ground	GND	I	–	–	–	–	–	–	–
H21	GND	Ground	GND	I	–	–	–	–	–	–	–
J18	GND	Ground	GND	I	–	–	–	–	–	–	–
L1	GND	Ground	GND	I	–	–	–	–	–	–	–
L7	GND	Ground	GND	I	–	–	–	–	–	–	–
L11	GND	Ground	GND	I	–	–	–	–	–	–	–
L15	GND	Ground	GND	I	–	–	–	–	–	–	–
L21	GND	Ground	GND	I	–	–	–	–	–	–	–
W11	GND	Ground	GND	I	–	–	–	–	–	–	–
N4	GND	Ground	GND	I	–	–	–	–	–	–	–
A1	GNDUTMI	Ground	GNDUTMI	I	–	–	–	–	–	–	–
A5	GNDUTMI	Ground	GNDUTMI	I	–	–	–	–	–	–	–
A8	GNDUTMI	Ground	GNDUTMI	I	–	–	–	–	–	–	–
E1	GNDUTMI	Ground	GNDUTMI	I	–	–	–	–	–	–	–
G7	GNDUTMI	Ground	GNDUTMI	I	–	–	–	–	–	–	–
B2	VDDUTMII	Power	VDDUTMII	I	–	–	–	–	–	–	–
C5	VDDUTMII	Power	VDDUTMII	I	–	–	–	–	–	–	–
C8	VDDUTMII	Power	VDDUTMII	I	–	–	–	–	–	–	–
E3	VDDUTMII	Power	VDDUTMII	I	–	–	–	–	–	–	–
F7	VDDUTMII	Power	VDDUTMII	I	–	–	–	–	–	–	–
A3	VDDUTMII	–	HHSA_DP	I/O	–	–	–	–	–	–	–
B3	VDDUTMII	–	HHSA_DM	I/O	–	–	–	–	–	–	–
D7	VDDUTMII	–	HHSA_CC1	I/O	–	–	–	–	–	–	–
G9	VDDUTMII	–	HHSA_CC2	I/O	–	–	–	–	–	–	–
C6	VDDUTMII	Analog input	HHSA_RTUNE	I	–	–	–	–	–	–	–
A4	VDDUTMII	–	HHSB_DP	I/O	–	–	–	–	–	–	–
B4	VDDUTMII	–	HHSB_DM	I/O	–	–	–	–	–	–	–
C7	VDDUTMII	–	HHSB_CC1	I/O	–	–	–	–	–	–	–
E8	VDDUTMII	–	HHSB_CC2	I/O	–	–	–	–	–	–	–
D8	VDDUTMII	Analog input	HHSB_RTUNE	I	–	–	–	–	–	–	–
A6	VDDUTMII	–	HHSC_DP	I/O	–	–	–	–	–	–	–
B6	VDDUTMII	–	HHSC_DM	I/O	–	–	–	–	–	–	–
B7	VDDUTMII	Analog input	HHSC_RTUNE	I	–	–	–	–	–	–	–
N6	VDDIODDR	Power	VDDIODDR	I	–	–	–	–	–	–	–
N9	VDDIODDR	Power	VDDIODDR	I	–	–	–	–	–	–	–
N12	VDDIODDR	Power	VDDIODDR	I	–	–	–	–	–	–	–
P3	VDDIODDR	Power	VDDIODDR	I	–	–	–	–	–	–	–
P13	VDDIODDR	Power	VDDIODDR	I	–	–	–	–	–	–	–
T6	VDDIODDR	Power	VDDIODDR	I	–	–	–	–	–	–	–
T7	VDDIODDR	Power	VDDIODDR	I	–	–	–	–	–	–	–
T9	VDDIODDR	Power	VDDIODDR	I	–	–	–	–	–	–	–
U3	VDDIODDR	Power	VDDIODDR	I	–	–	–	–	–	–	–
U5	VDDIODDR	Power	VDDIODDR	I	–	–	–	–	–	–	–
U6	VDDIODDR	Power	VDDIODDR	I	–	–	–	–	–	–	–
AA5	VDDIODDR	Power	VDDIODDR	I	–	–	–	–	–	–	–
W8	VDDIODDR	Power	VDDIODDR	I	–	–	–	–	–	–	–
Y2	VDDIODDR	Power	VDDIODDR	I	–	–	–	–	–	–	–
M11	VDDIODDR	Power	VDDIODDR	I	–	–	–	–	–	–	–
K11	GND	Ground	GND	I	–	–	–	–	–	–	–
N18	GND	Ground	GND	I	–	–	–	–	–	–	–
P1	GND	Ground	GND	I	–	–	–	–	–	–	–
P8	GND	Ground	GND	I	–	–	–	–	–	–	–
P14	GND	Ground	GND	I	–	–	–	–	–	–	–
P21	GND	Ground	GND	I	–	–	–	–	–	–	–
R5	GND	Ground	GND	I	–	–	–	–	–	–	–
R7	GND	Ground	GND	I	–	–	–	–	–	–	–
R17	GND	Ground	GND	I	–	–	–	–	–	–	–
T5	GND	Ground	GND	I	–	–	–	–	–	–	–
T17	GND	Ground	GND	I	–	–	–	–	–	–	–
U1	GND	Ground	GND	I	–	–	–	–	–	–	–
U7	GND	Ground	GND	I	–	–	–	–	–	–	–
U21	GND	Ground	GND	I	–	–	–	–	–	–	–
V9	GND	Ground	GND	I	–	–	–	–	–	–	–
W11	GND	Ground	GND	I	–	–	–	–	–	–	–
Y1	VDDIODDR	Analog input	DDR_VREF	I	–	–	–	–	–	–	–
N2	VDDIODDR	–	DDR_D0	I/O	–	–	–	–	–	–	–
M7	VDDIODDR	–	DDR_D1	I/O	–	–	–	–	–	–	–
R3	VDDIODDR	–	DDR_D2	I/O	–	–	–	–	–	–	–
M8	VDDIODDR	–	DDR_D3	I/O	–	–	–	–	–	–	–
T2	VDDIODDR	–	DDR_D4	I/O	–	–	–	–	–	–	–
N8	VDDIODDR	–	DDR_D5	I/O	–	–	–	–	–	–	–
T1	VDDIODDR	–	DDR_D6	I/O	–	–	–	–	–	–	–
N7	VDDIODDR	–	DDR_D7	I/O	–	–	–	–	–	–	–
Y7	VDDIODDR	–	DDR_D8	I/O	–	–	–	–	–	–	–
AA4	VDDIODDR	–	DDR_D9	I/O	–	–	–	–	–	–	–
Y9	VDDIODDR	–	DDR_D10	I/O	–	–	–	–	–	–	–
Y3	VDDIODDR	–	DDR_D11	I/O	–	–	–	–	–	–	–
AA7	VDDIODDR	–	DDR_D12	I/O	–	–	–	–	–	–	–
AA3	VDDIODDR	–	DDR_D13	I/O	–	–	–	–	–	–	–
W7	VDDIODDR	–	DDR_D14	I/O	–	–	–	–	–	–	–
W3	VDDIODDR	–	DDR_D15	I/O	–	–	–	–	–	–	–
W6	VDDIODDR	–	DDR_A0	O	–	–	–	–	–	–	–
P6	VDDIODDR	–	DDR_A1	O	–	–	–	–	–	–	–
V5	VDDIODDR	–	DDR_A2	O	–	–	–	–	–	–	–
V6	VDDIODDR	–	DDR_A3	O	–	–	–	–	–	–	–
R6	VDDIODDR	–	DDR_A4	O	–	–	–	–	–	–	–
W4	VDDIODDR	–	DDR_A5	O	–	–	–	–	–	–	–
P7	VDDIODDR	–	DDR_A6	O	–	–	–	–	–	–	–
W2	VDDIODDR	–	DDR_A7	O	–	–	–	–	–	–	–
L8	VDDIODDR	–	DDR_A8	O	–	–	–	–	–	–	–
V4	VDDIODDR	–	DDR_A9	O	–	–	–	–	–	–	–
T3	VDDIODDR	–	DDR_A10	O	–	–	–	–	–	–	–
M9	VDDIODDR	–	DDR_A11	O	–	–	–	–	–	–	–
P5	VDDIODDR	–	DDR_A12	O	–	–	–	–	–	–	–
V2	VDDIODDR	–	DDR_A13	O	–	–	–	–	–	–	–
L9	VDDIODDR	–	DDR_A14	O	–	–	–	–	–	–	–
R4	VDDIODDR	–	DDR_A15	O	–	–	–	–	–	–	–
U4	VDDIODDR	–	DDR_CLK	O	–	–	–	–	–	–	–
T4	VDDIODDR	–	DDR_CLKN	O	–	–	–	–	–	–	–
V3	VDDIODDR	–	DDR_CKE	O	–	–	–	–	–	–	–
V1	VDDIODDR	–	DDR_RESETN	O	–	–	–	–	–	–	–
V7	VDDIODDR	–	DDR_CSN	O	–	–	–	–	–	–	–
N10	VDDIODDR	–	DDR_WEN	O	–	–	–	–	–	–	–
U8	VDDIODDR	–	DDR_RASN	O	–	–	–	–	–	–	–
T8	VDDIODDR	–	DDR_CASN	O	–	–	–	–	–	–	–
N1	VDDIODDR	–	DDR_DQM0	O	–	–	–	–	–	–	–
Y4	VDDIODDR	–	DDR_DQM1	O	–	–	–	–	–	–	–
R1	VDDIODDR	–	DDR_DQS0	I/O	–	–	–	–	–	–	–
Y6	VDDIODDR	–	DDR_DQS1	I/O	–	–	–	–	–	–	–
R2	VDDIODDR	–	DDR_DQSN0	I/O	–	–	–	–	–	–	–
AA6	VDDIODDR	–	DDR_DQSN1	I/O	–	–	–	–	–	–	–
V8	VDDIODDR	–	DDR_BA0	O	–	–	–	–	–	–	–
P4	VDDIODDR	–	DDR_BA1	O	–	–	–	–	–	–	–
R8	VDDIODDR	–	DDR_BA2	O	–	–	–	–	–	–	–
W1	VDDIODDR	–	DDR_ODT	O	–	–	–	–	–	–	–
AA2	VDDIODDR	Analog input	DDR_ZQ	I	–	–	–	–	–	–	–
T15	VDDDPHY	Power	VDDDPHY	I	–	–	–	–	–	–	–
T16	VDDDPHY	Power	VDDDPHY	I	–	–	–	–	–	–	–
R15	GNDDPHY	Ground	GNDDPHY	I	–	–	–	–	–	–	–
U15	GNDDPHY	Ground	GNDDPHY	I	–	–	–	–	–	–	–
N20	VDDDPHY	–	MIPI_CLKN	I	–	–	–	–	–	–	–
N21	VDDDPHY	–	MIPI_CLKP	I	–	–	–	–	–	–	–
R18	VDDDPHY	–	MIPI_DN0	I	–	–	–	–	–	–	–
P18	VDDDPHY	–	MIPI_DP0	I	–	–	–	–	–	–	–
R20	VDDDPHY	–	MIPI_DN1	I	–	–	–	–	–	–	–
R21	VDDDPHY	–	MIPI_DP1	I	–	–	–	–	–	–	–
R19	VDDDPHY	Analog input	MIPI_REXT	I	–	–	–	–	–	–	–
J16	VDDSDMMC0	Power	VDDSDMMC0	I	–	–	–	–	–	–	–
C11	VDDSDMMC1	Power	VDDSDMMC1	I	–	–	–	–	–	–	–
V13	GND	Ground	GND	I	–	–	–	–	–	–	–
K15	VDDSDMMC0	Analog input	SDMMC0_CAL	I	–	–	–	–	–	–	–
J10	VDDSDMMC1	Analog input	SDMMC1_CAL	I	–	–	–	–	–	–	–
F13	VDDSDMMC2	Power	VDDSDMMC2	I	–	–	–	–	–	–	–
D14	VDDSDMMC2	Analog input	SDMMC2_CAL	I	–	–	–	–	–	–	–
R11	GNDBAT	Ground	GNDBAT	I	–	–	–	–	–	–	–
P11	VBAT	Power	VBAT	I	–	–	–	–	–	–	–
AA19	VBAT	PIOBU	PIOBU0	I	–	–	–	–	–	–	PU⁽⁵⁾
P9	VBAT	PIOBU	PIOBU1	I	–	–	–	–	–	–	PU⁽⁵⁾
AA18	VBAT	PIOBU	PIOBU2	I	–	–	–	–	–	–	PU⁽⁵⁾
P10	VBAT	PIOBU	PIOBU3	I	–	–	–	–	–	–	PD⁽⁵⁾
J2	VDDIN33	–	XIN	I	–	–	–	–	–	–	–
J1	VDDIN33	–	XOUT	O	–	–	–	–	–	–	–
Y13	VBAT	–	XIN32	I	–	–	–	–	–	–	–
AA13	VBAT	–	XOUT32	O	–	–	–	–	–	–	–
AA9	VBAT	–	TST	I	–	–	–	–	–	–	PD
W15	VBAT	–	JTAGSEL	I	–	–	–	–	–	–	PD
AA15	VBAT	–	WKUP0	I	–	–	–	–	–	–	–
R9	VBAT	–	SHDN	O	–	–	–	–	–	–	–
J7	VDDIN33	–	NRST	I	–	–	–	–	–	–	PU
H4	VDDIN33	–	NRST_OUT	O	–	–	–	–	–	–	–
K7	VDDIN33	GPIO	AUDIOCLK	O	–	–	–	–	–	–	–
R10	VBAT	–	LPM	O	–	–	–	–	–	–	–
N16	VDDQSPI0	Power	VDDQSPI0	I	–	–	–	–	–	–	–
P16	VDDQSPI0	Analog input	QSPI0_CAL	I	–	–	–	–	–	–	–
H19	VDDQSPI1	Power	VDDQSPI1	I	–	–	–	–	–	–	–
Note: I/Os for each peripheral are grouped into I/O sets, listed in the column "I/O Set". For all peripherals, use I/Os that belong to the same I/O set. Timings can be unpredictable when I/Os from different I/O sets are mixed. When using an I/O line with the Analog-to-Digital Converter (ADC) or with the Analog Comparator Controller (ACC), the PIO line configuration (pull-up, pull-down) programmed before assigning this line to the ADC or ACC peripheral is not modified by this peripheral. Refer to the section Electrical Characteristics for further details. Signal = ‘PIO’ if GPIO; Dir = Direction; PU = Pull-up; PD = Pull-down; HiZ = High impedance; ST = Schmitt Trigger This is the PIOBU state after VBAT power-up. If programmed to another value, this value is maintained as long as VBAT is not removed.