The following configuration values are valid for all listed bit names of this register:
0: The corresponding interrupt is not enabled.
1: The corresponding interrupt is enabled.
Name:
TZAESB_IMR
Offset:
0x18
Reset:
0x00000000
Property:
Read-only
Bit
31
30
29
28
27
26
25
24
Access
Reset
Bit
23
22
21
20
19
18
17
16
SECE
Access
R
Reset
0
Bit
15
14
13
12
11
10
9
8
URAD
Access
R
Reset
0
Bit
7
6
5
4
3
2
1
0
Access
Reset
Bit 19 – SECE Security and/or Safety Event
Bit 8 – URAD Unspecified Register Access Detection Interrupt Mask
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
