5.4 Standby Mode

The AT24C256C features a low‑power Standby mode that is enabled when any one of the following occurs:

A valid power-up sequence is performed (see Power-Up Requirements and Reset Behavior).
A Stop condition at the end of a valid I²C transaction is received by the device unless it initiates an internal write cycle (see Write Operations).
At the completion of an internal write cycle (see Write Operations).

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