19.2 PPS Inputs

Each digital peripheral has a dedicated PPS Peripheral Input Selection (xxxPPS) register with which the input pin to the peripheral is selected. Devices that have 20 leads or less (8/14/16/20) allow PPS routing to any I/O pin, while devices with 28 leads or more allow PPS routing to I/Os contained within two ports (see the table below). The outputs of the Signal Routing Port (SRPORT) can also be used as inputs to other peripherals using PPS.

Important: The notation “xxx” in the generic register name is a placeholder for the peripheral identifier. For example, xxx = T0CKI for the T0CKIPPS register.

Multiple peripherals can operate from the same source simultaneously. Port reads always return the pin level regardless of peripheral PPS selection. If a pin also has analog functions associated, the ANSEL bit for that pin must be cleared to enable the digital input buffer.

Table 19-1. PPS Input Selection Table
PeripheralPPS Input RegisterDefault Pin Selection at PORRegister Reset Value at PORAvailable Input Port
28-Pin Devices40-Pin Devices
External Interrupt INTPPSRB0‘b001 000AB—SRPORTAB———SRPORT
Timer0 ClockT0CKIPPSRA4‘b000 100AB—SRPORTAB———SRPORT
Timer1 ClockT1CKIPPSRC0‘b010 000A—CSRPORTA—C——SRPORT
Timer1 GateT1GPPSRB5‘b001 101—BCSRPORT—BC——SRPORT
Timer3 ClockT3CKIPPSRC0‘b010 000—BCSRPORT—BC——SRPORT
Timer3 GateT3GPPSRC0‘b010 000A—CSRPORTA—C——SRPORT
Timer2 InputT2INPPSRC3‘b010 011A—CSRPORTA—C——SRPORT
Timer4 InputT4INPPSRC5‘b010 101—BCSRPORT—BC——SRPORT
Timer6 InputT6INPPSRB7‘b001 111—BCSRPORT—B—D—SRPORT
CCP1CCP1PPSRC2‘b010 010—BCSRPORT—BC——SRPORT
CCP2CCP2PPSRC1‘b010 001—BCSRPORT—BC——SRPORT
PWM Input 0PWMIN0PPSRC2‘b010 010—BCSRPORT—BC——SRPORT
PWM Input 1PWMIN1PPSRC1‘b010 001—BCSRPORT—BC——SRPORT
PWM1 External ResetPWMIN1ERSPPSRC3‘b010 011A—CSRPORTA—C——SRPORT
PWM2 External ResetPWMIN2ERSPPSRC5‘b010 101—BCSRPORT—BC——SRPORT
CWG1CWG1PPSRB0‘b001 000—BCSRPORT—B—D—SRPORT
CLCIN0CLCIN0PPSRA0‘b000 000A—CSRPORTA—C——SRPORT
CLCIN1CLCIN1PPSRA1‘b000 001A—CSRPORTA—C——SRPORT
CLCIN2CLCIN2PPSRB6‘b001 110—BCSRPORT—B—D—SRPORT
CLCIN3CLCIN3PPSRB7‘b001 111—BCSRPORT—B—D—SRPORT
SCL1/SCK1SSP1CLKPPS(1)RC3‘b010 011—BCSRPORT—BC——SRPORT
SDA1/SDI1SSP1DATPPS(1)RC4‘b010 100—BCSRPORT—BC——SRPORT
SS1SSP1SSPPSRA5‘b000 101A—CSRPORTA——D—SRPORT
SCL2/SCK2SSP2CLKPPS(1)RB1‘b001 001—BCSRPORT—B—D—SRPORT
SDA2/SDI2SSP2DATPPS(1)RB2‘b001 010—BCSRPORT—B—D—SRPORT
SS2SSP2SSPPSRB0‘b001 000—BCSRPORT—B—D—SRPORT
RX1/DT1RX1PPSRC7‘b010 111—BCSRPORT—BC——SRPORT
CK1CK1PPSRC6‘b010 110—BCSRPORT—BC——SRPORT
RX2/DT2RX2PPSRB7‘b001 111—BCSRPORT—B—D—SRPORT
CK2CK2PPSRB6‘b001 110—BCSRPORT—B—D—SRPORT
ADC Conversion TriggerADACTPPSRB4‘b001 100—BCSRPORT—B—D—SRPORT
Signal Routing Port Input 0PORTWIN0PPSRC1‘b010 001A—C—A—C———
Signal Routing Port Input 1PORTWIN1PPSRC2‘b010 010A—C—A—C———
Signal Routing Port Clock InputPORTWCLKPPSRC3‘b010 011A—C—A—C———
Analog Peripheral Manager APMCLKPPSRC4‘b010 100—BC——BC———
Note:
  1. Bidirectional pin. The corresponding output must select the same pin.