27.5.2 CCPxCAP
| Name: | CCPxCAP |
| Offset: | 0x040F,0x0413 |
Capture Trigger Input Selection Register
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CTS[3:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
Bits 3:0 – CTS[3:0] Capture Trigger Input Selection
| Value | Description |
|---|---|
1111-1001 | Reserved |
1000 | Logical OR of all IOCWF bits |
0111 | CLC4_OUT |
0110 | CLC3_OUT |
0101 | CLC2_OUT |
0100 | CLC1_OUT |
0011 | IOC Interrupt |
0010 | CMPLP1_OUT |
0001 | C1_OUT |
0000 | Pin selected by CCPxPPS |