1.1 Output Voltage Requirements
FPGAs require multiple voltage rails to support various internal blocks, as detailed in Table 1-1, Table 1-2 and Table 1-3. The power supply design process begins by defining these voltage rails. Typically, the FPGA power supply converts input power—often sourced from a DC bus provided by a switching mode power supply (SMPS)—to the specific voltages required by the FPGA’s core, I/O ports, auxiliary circuits, transceivers and phase-locked loops (PLLs).
Each of these functional blocks has distinct voltage requirements. The voltage regulator’s primary role is to maintain stable output voltages to the FPGA, even in the presence of input voltage fluctuations and load transients. Among these rails, the core voltage is generally the most demanding in terms of power consumption, as it supplies the internal logic blocks and typically operates at a lower voltage, depending on the FPGA technology.
Due to the high current requirements of the core—often reaching tens of amps—the core voltage rail must adhere to strict specifications for voltage accuracy, ripple, and both load and line regulation. Meeting these requirements is critical to ensuring the stable and reliable performance of the FPGA.
Total Voltage Rail Tolerance
When powering an FPGA, strict voltage rail tolerance and accuracy requirements must be met to ensure reliable operation. Several factors contribute to output voltage tolerance, including the regulator’s nominal output voltage, voltage rail accuracy, output voltage ripple, and the power supply’s load and line regulation. As illustrated in Figure 1-1, voltage rail tolerance can be divided into two main categories:
- Static (DC Accuracy) – This
aspect of tolerance encompasses the output voltage ripple and the power supply
regulation. The DC output voltage accuracy of a power supply or voltage regulator is
a critical parameter, indicating how closely the actual output voltage aligns with
the intended nominal value. This accuracy is typically specified as a percentage of
the nominal output voltage. Maintaining precise voltage accuracy is essential for
FPGAs, as even minor deviations can result in timing errors, increased power
consumption, signal integrity issues, or permanent device damage. Effective voltage
regulation is particularly important in high-speed, high-performance and
power-sensitive applications to ensure optimal FPGA operation, reliability and
longevity.
Figure 1-1. Output Voltage Tolerance [%] 
- Dynamic (AC Accuracy) –
Dynamic tolerance addresses variations due to load and line transients. The
regulator may be required to supply current to both the FPGA and other system loads,
leading to significant fluctuations in input voltage depending on activity levels.
Since FPGA power consumption varies with workload, the regulator must maintain
output voltage within tight limits during these changes. The regulator’s dynamic
response—its ability to react to sudden load or input voltage changes—is primarily
determined by its control architecture. Peak current mode control is often
preferred, as it offers a balanced combination of simplicity, performance and
stability. A fast transient response reduces the need for large output capacitance,
resulting in cost savings, smaller solution size and improved system performance.
FPGA data sheets typically specify the maximum allowable transient deviations in
both amplitude and duration.
Critical Power Supply Requirements Example: Transceiver (VDDA)
The transceiver rail on the FPGA has the most stringent requirements among all the rails. Its accuracy tolerance is typically between 2.5% and 3%, and it must meet strict noise specifications, with a voltage ripple of 10 mV peak-to-peak or less across a broad frequency range. Consequently, a dedicated power supply may be necessary for this rail, even if it shares the same voltage requirements as another rail. To achieve this high level of noise performance, a dedicated linear solution with high Power Supply Rejection Ration (PSRR) and low spectral noise is recommended for best performance.
Table 1-1. PolarFire® Recommended Operating Conditions Parameter Symbol Nominal Tolerance FPGA Core Supply VDD 1V/1.05V ±3% Transceiver Tx and Rx Lanes Supply VDDA 1V/1.05V ±3% Programming and HSIO Receiver Supply VDD18 1.8V ±5% FPGA Core and FPGA PLL High-Voltage Supply VDD25 2.5V ±3% Transceiver PLL High-Voltage Supply VDDA25 2.5V ±3% Transceiver Reference Clock Supply VDD_XCVR_CLK 2.5V/3.3V ±5% HSIO DC I/O Supply VDDIx 1.2V/1.35V/1.5V/1.8V ±5% GPIO DC I/O Supply VDDIx 1.2V/1.5V/1.8V/2.5V/3.3V ±5% Dedicated I/O DC Supply for JTAG and SPI (GPIO Bank 3) VDDI3 1.8V/2.5V/3.3V ±5% GPIO Auxiliary Supply VDDAUXx 2.5V/3.3V ±5% Global VREF for Transceiver Reference Clocks XCVRVREF <VDD_XCVR_CLK - Table 1-2. IGLOO® Recommended Operating Conditions Parameter Symbol Nominal Tolerance FPGA Core Supply
VCC 1.2V/1.5V
±5% JTAG DC Voltage VJTAG 1.4 to 3.6V - Programming Voltage (Programming Mode) VPUMP 3.3V
±5% Analog Power Supply (PLL) VCCPLL 1.2V/1.5V
±5% 1.2V DC Core Supply Voltage VCCI and VMV 1.2V
±5% 1.2V DC Wide Range DC Supply Voltage 1.2V/1.5V
±5% 1.5V DC Supply Voltage 1.5V
±5% 1.8V DC Supply Voltage 1.8V
±5% 2.5V DC Supply Voltage 2.5V
±8% 3.0V DC Supply Voltage 3V
±9% 3.3V DC Supply Voltage 3.3V
±9% LVDS Differential I/O 2.5V
±5% LVPECL Differential I/O 3.3V
±9% Table 1-3. SmartFusion® Recommended Operating Conditions Parameter Symbol Nominal Tolerance 1.5V DC Core Supply Voltage VCC 1.5V
±5% JTAG DC Voltage VJTAG 1.425 to 3.6V
- Programming Voltage (Programming Mode) VPP 3.3V
±5% Analog Power Supply (PLL) VCCPLLx 1.5V
±5% 1.5V DC Supply Voltage VCCFPGAIOBx/ VCCMSSIOBx 1.5V
±5% 1.8V DC Supply Voltage 1.8V
±5% 2.5V DC Supply Voltage 2.5V
±8% 3.3V DC Supply Voltage 3.3V
±9% LVDS Differential I/O 2.5V
±5% LVPECL Differential I/O 3.3V
±9% Analog Clean 3.3V Supply to the Analog Circuitry VCC33A5 3.3V
±5% Analog 3.3V Supply to ADC VCC33ADCx5 Analog Clean 3.3V Supply to the Charge Pump VCC33AP5 Analog 3.3V Supply to Sigma-delta DAC VCC33SDDx5 Voltage Reference for ADC VAREFx 2.527 to 3.3V - Analog Supply to the Integrated RC Oscillator VCCRCOSC 3.3V
±5% External Battery Supply VDDBAT 2.7 to 3.63V - Analog Supply to the Main Crystal Oscillator VCCMAINXTAL5 3.3V
±5% Analog Supply to the Low Power 32 KHz Crystal Oscillator VCCLPXTAL5 Embedded Nonvolatile Memory Supply VCCENVM 1.5V
±5% Embedded SRAM Supply VCCESRAM Analog 1.5V Supply to the Analog Circuitry VCC15A2 Analog 1.5V Supply to the ADC VCC15ADCx2