3 MCP16701 High-Performance, High-Accuracy PMIC for High-End MPU and FPGA Power Solutions

Features

  • Input Voltage: 2.7V to 5.5V
  • Eight 1.5A Buck DC-DC Channels
  • Four 300 mA High-Accuracy LDOs
  • One High-Accuracy, High-PSRR LDO Controller Using an External N-channel MOSFET (SERDES Lane Supply)
  • ±0.8% Output Voltage Accuracy for Bucks (VDD), for VFB ≥ 1V
  • -1.5%/+1% Output Voltage Accuracy for the LDO Controller, for VFB ≥ 0.9V
  • ±1% Output Voltage Accuracy for LDOs, for VFB ≥ 1.8V
  • Directly Parallelizable Buck Channel Power Stages - up to 4 - for a Combined Current Capability up to 6A
  • Tight RDS(ON) Matching of Parallelizable Channels for Good Current Sharing
  • Minimum Number of Inductors: Paralleled Buck Channels Share the Same Inductor
  • Programmable Output Voltage for all Buck and LDO Channels, 0.6V to 3.8V - No External Feedback Resistors Required
  • 100% Duty Cycle Capability of Buck Channels
  • LDO Controller Output Voltage 0.6V to 1.6V/12.5 mV steps
  • Reference Ground (REFGND) can be Remotely Routed to the Load Ground (Pseudo Remote Sensing)
  • Low-Noise Forced-PWM and Light-Load High-Efficiency Mode Available (Pin-Selectable or Bit Control)
  • External Synchronization of Switching Frequency, with Accurate Switching-Events Time Positioning
  • 3.4 MHz I2C Interface

Voltage Accuracy and Tolerance

The MCP16701 is designed to deliver precise voltage regulation with tight accuracy and tolerance specifications:

  • Buck Channels: Output voltage can be set from 0.6V to 1.6V in 12.5 mV increments, and from 1.6V to 3.8V in 25 mV increments. The device achieves an accuracy of up to ±0.8% (VFB ≥ 1V) across the operating temperature range. Integrated feedback resistors enhance overall accuracy through superior matching and also help minimize component count and board space.
  • LDOs: Output voltage can be set from 0.6V to 1.6V in 12.5 mV increments and from 1.6V to 3.8V in 25 mV increments, with an accuracy of ±1% overtemperature. High-PSRR LDOs can also be cascaded (in groups of two) to the output of a DC-DC channel, further improving overall conversion efficiency.
  • LDO Controller: Output voltage is programmable from 0.6V to 1.6V in 12.5 mV increments, offering high accuracy (-1.5%/+1% for VFB ≥ 0.9V). This solution is designed to provide a clean supply voltage to SERDES lanes. It can do so while maintaining high PSRR, low noise, fast load transient performance, and scalability for different applications. The LDO controller typically post-regulates the output of one (or more, if paralleled) Buck channel to a slightly lower, tightly regulated voltage. Protection features are managed by the upstream Buck stage.
Figure 3-1. Buck5 and Buck6 in Parallel Configuration Load Transient Response (FPWM Mode, VOUT5/6 = 1.35V)

In terms of Sequencing Requirements, MCP16701 can be highly configurable.