24.5 Peripheral Dependencies
| Peripheral Name | RTC |
| Base Address | 0X4407 2000 (Peripheral Bus A) |
| NVIC IRQ Index:Source | 15 : TAMPER 16 : Overflow (OVF) 17 : Period x (PERx), x=0,1,…7 18: Compare x (CMPx), x = 0,1,2,3 |
| MCLK AXI/APB Clocks Index:Name (1) | MCLK.CLKMSK0[15] |
| GCLK Peripheral Channel Index:Clock Name | NA |
| PAC Peripheral Peripheral Identifier (PAC.WRCTRL) | 12 |
| APB Mask Register[Index] | INTFLAGA[12] |
| AHB Mask Register[Index] | NA |
| DMA Trigger Index:Source (DMAC.CHCTRLBk) | 4 : RTC Timestamp (TIMESTAMP) |
| EVSYS Users (EVSYS.USERm) (2) | 1 : TAMPER (A) |
| EVSYS Generators (EVSYS.CHANNELn) | 5-12 : Periodic Interval n (RTC_PERx), x=0,1…7 13-16 : Compare x (RTC_CMPx), x = 0..3 17 : Tamper (RTC_TAMPER) 18 : Overflow (RTC_OVF) 19 : Daily Period (RTC_PERD) |
| Power Domain | VDDREG |
- Register Field: MCLK.CLKMSK{index/32}.MASK[index mod 32].
- (A,S,R): A = Asynchronous path, S = Synchronous path, R = Resynchronized path.
Clocks
The RTC bus clock (CLK_RTC_APB) can be enabled and disabled in the Main Clock module MCLK, and the default state of CLK_RTC_APB can be found in Peripheral Clock Masking section.
A 32 kHz or 1 kHz oscillator clock (CLK_RTC_OSC) is required to clock the RTC. This clock must be configured and enabled in the 32 kHz oscillator controller (OSC32KCTRL) before using the RTC.
This oscillator clock is asynchronous to the bus clock (CLK_RTC_APB). Due to this asynchronicity, writing to certain registers will require synchronization between the clock domains. Refer to Synchronization for additional information.
Debug Operation
When the CPU is halted in Debug mode, the RTC will halt normal operation. The RTC can be forced to continue operation during debugging. Refer to DBGCTRL for additional information.
Register Access Protection
All registers with write-access are optionally write-protected by the peripheral access controller (PAC), except the Interrupt Flag Status and Clear (INTFLAG) register.
Write-protection is denoted by the "PAC Write-Protection" property in the register description.
Write-protection does not apply to accesses through an external debugger. Refer to the PAC - Peripheral Access Controller for details.
Analog Connections
A 32.768 kHz crystal can be connected to the XIN32 and XOUT32 pins, along with any required load capacitors. See the Electrical Characteristics for details on recommended crystal characteristics and load capacitors.