50.1 Introduction

This chapter describes a common checklist that must be used when starting and reviewing the schematics for the PIC32CZ CA design. This chapter illustrates the recommended power supply connections and how to connect the external analog references, programmer, and debugger.

Note:
  1. VDDIO/AVDD ≥ VDDREG during power-up/down.
  2. All capacitors are ceramic w/ESR < 1Ω.
  3. Package PAD must be soldered to ground with multiple via’s to ground PCB layer (see suggested PAD landing pattern).
  4. In the case of packages with leads, all decoupling capacitors must be placed on the same side of the PCB as the MCU and as close to the pins as possible. In the case of BGA packages, all decoupling capacitors must be placed on the opposite side of the PCB from the MCU with minimal distance between the ball and the associated capacitor.
  5. If USB is not being used in the application, the VUSB3V3 pins should be connected to ground.
  6. If JTAG will be the primary debugging interface during development or in the case that boundary scan will be implemented in manufacturing, use of any alternative functions on the TMS, TDO, TDI, and TCK pins should be avoided.
  7. If the trace functions are implemented, the ability to isolate these signals from any alternative functions during development is recommended.
  8. All ground connections must be made to the ground plane PCB layer with the shortest possible fan-out.

Option One

This ensures VDDREG will never exceed VDDIO.

This option is required for safe operation.

Option Two

This option is not recommended for safe operation.

Only approved if a soft start circuit is used on the VDDREG supply to guarantee it lags.

Warning: Failure to follow these recommendations could result in excessive current or silicon reliability concerns.