31.1 Block Diagram
The following figure shows the NVM Controller within the context of the system’s block diagram. There are two bus interfaces, one to the AHB Bus Matrix and one to Peripheral Bus A. The NVM Controller is built from two separate modules, described below, the Flash Controller, Write (FCW) and Flash Controller, Read (FCR).
The FCW’s main interface is with the FCR, as shown in the following figure. The FCR provides the interface to the AHB Bus Matrix (four read ports and four write ports) and Peripheral Bus A. It also provides the interface to the two flash panels in support of the rest of the device.