23.11 Register Summary - Timer2


Offset	Name	Bit Pos.	7	6	5	4	3
0x00 ... 0x038B	Reserved
0x038C	T2TMR	7:0	T2TMR[7:0]
0x038D	T2PR	7:0	T2PR[7:0]
0x038E	T2CON	7:0	ON	CKPS[2:0]			OUTPS[3:0]
0x038F	T2HLT	7:0	PSYNC	CPOL	CSYNC	MODE[4:0]
0x0390	T2CLKCON	7:0				CS[4:0]
0x0391	T2RST	7:0				RSEL[4:0]

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