1 Silicon Issue Summary

Legend


Peripheral	Short Description	Valid for Silicon Revision
Peripheral	Short Description	Rev. A
Device	IDD Power-Down Current Consumption	X
	Writing the OSCLOCK Fuse in FUSE.OSCCFG to ‘`1`’ Prevents Automatic Loading of Calibration Values	X
	Write Operation Lost if Consecutive Writes to Specific Address Spaces	X
ADC	Low Latency Mode Must Be Set Before Changing ADC Configuration	X
	The PGA Initialization Delay Does Not Work Outside Low Latency Mode	X
	ADC Stays Active in Sleep Modes for Low Latency Mode and Free Running Mode	X
CCL	The CCL Must be Disabled to Change the Configuration of a Single LUT	X
CRCSCAN	Running CRC Scan on Part of The Flash is Non-Functional	X
NVMCTRL	Wrong Reset Value of NVMCTRL.CTRLA Register	X
TCA	Restart Will Reset Counter Direction in NORMAL and FRQ Mode	X
TCB	CCMP and CNT Registers Act as 16-Bit Registers in 8-Bit PWM Mode	X
USART	Start-of-Frame Detection Can Unintentionally Be Triggered in Active Mode	X
USART	Receiver Non-Functional after Detection of Inconsistent Synchronization Field	X