35.3.6.2 Clock and Data Change Alignment
The CKP, CKE and SMP bits control the relationship between the SCK clock output, SDO
output data changes, and SDI input data sampling. The bit functions are as follows:
- CKP controls SCK output polarity
- CKE controls SDO output change relative to the SCK clock
- SMP controls SDI input sampling relative to the clock edges
The CKE bit, when set, inverts the low Idle state of the SCK output to a high Idle state.
The following figures illustrate the eight possible combinations of the CKP, CKE and SMP
bit selections.
Important: All
timing diagrams assume the LSBF bit is cleared.
0, SMP = 01, SMP = 10, SMP = 11, SMP = 0